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BU97950FUV-E2 Datasheet(PDF) 8 Page - Rohm

Part # BU97950FUV-E2
Description  Standard LCD Segment Drivers
Download  25 Pages
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Manufacturer  ROHM [Rohm]
Direct Link  http://www.rohm.com
Logo ROHM - Rohm

BU97950FUV-E2 Datasheet(HTML) 8 Page - Rohm

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TSZ02201-0A0A2D300090-1-2
08.Sep.2015 Rev.004
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
BU97950FUV
MAX 280 segments (SEG35×COM8)
Read Command Register and Transfer Method
BU97950 enters “Read mode” when R/W bit of Slave address is „1‟
During Read mode the command registers can be read.
The sequence for the command register read is shown below.
0111110
A 1
S
ADSET
Slave address
Command
0
R/W
A S
0111110
1
Slave address
R/W
A
Data
A P
The following register settings can be read in this mode.
Only one register setting can be read at once, after reading register setting, BU97950 will exit from read mode and wait
for slave address. If all register setting needs to be read, please make sequence for “REG1” and “REG2”, respectively.
Register
D7 D6 D5 D4 D3 D2 D1 D0
Address
REG1
0
0
P5
P4
P3
P2
P1
P0
23h
REG2
P7
P6
P5
P4
P3
P2
P1
P0
24h
REG1: P5 = Software reset condition
P4 to P0 = EVR setting
REG2: P7 to P6 = Frame Frequency (FR) setting
P5 to P4 = Power Save Mode (SR) setting
P3 = LCD drive waveform setting
P2 = Display ON/OFF setting
P1 = APON setting
P0 = APOFF setting
An example of the command register read sequence is shown below.
SCL
SDA
Slave Address (read)
A
P7
P6 P5 P4 P3 P2 P1 P0
A
S
P
LCD Driver Bias Circuit
This device generates LCD driving voltage with built in Buffer AMP.
And it can drive LCD at low power consumption.
*Line and frame inversion is set in DISCTL command.
Refer to the “LCD driving waveform” about each LCD driving waveform.
Reset initialize condition
Initial condition after Software Reset is as follows.
Display is OFF.
DDRAM address is initialized (DDRAM Data is not initialized).
Refer to Command Description about initialize value of register.
Command / Function List
Description List of Command / Function
Command
Function
1
Address set (ADSET)
DDRAM address setting (00h to 22h)
Command register address setting (23h, 24h)
2
EVR set (EVRSET)
EVR setting (0 to 31)
3
Display Control (DISCTL)
Frame Frequency, Power save mode setting
4
IC operation set (ICSET)
LCD drive mode, software reset, display on/off
5
All pixel Control (APCTL)
All pixel control during display ON


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