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SAP5 Datasheet(PDF) 8 Page - Integrated Device Technology

Part # SAP5
Description  AS-Interface Spec. V3.0 Compliant Universal AS-i IC
Download  66 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

SAP5 Datasheet(HTML) 8 Page - Integrated Device Technology

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SAP51 / SAP5S Datasheet
© 2016 Integrated Device Technology, Inc.
8
January 28, 2016
2
General Device Specification
Important note: The absolute maximum ratings given in section 2.1 are stress ratings only. The SAP5 might not
function or be operable above the recommended operating conditions given in section 2.2. Stresses exceeding
the absolute maximum ratings might also damage the device. In addition, extended exposure to stresses above
the recommended operating conditions might affect device reliability. IDT does not recommend designing to the
specifications given under “Absolute Maximum Ratings.”
Important note: The operating conditions given in section 2.2 set the conditions over which IDT specifies device
operation. These are the conditions that the application circuit should provide to the device for it to function as
intended. Unless otherwise noted, the limits for parameters that appear in the operating conditions section are
used as test conditions.
2.1.
Absolute Maximum Ratings (Non-operating)
Table 2.1
Absolute Maximum Ratings
PARAMETER
SYMBOL
MIN
MAX
UNIT
Voltage reference
VLTGN
0
0
V
Voltage difference
1) between LTGP and LTGN pins (V
LTGP - VLTGN)
VLTGP-LTGN
0
40
V
Pulse voltage
2), 3) between LTGP and LTGN (V
LTGP - VLTGN)
VLTGP-LTGN_P
0
50
V
Voltage at the CDC, D0, D1, D2, D3, P0, P1, P2, P3, DSTBn,
PSTBn, LED1, LED2, PFAULT, and UOUT pins
Vinputs1
-0.3
VUOUT+ 0.3
V
Voltage at the OSC1, OSC2, U5R pins
Vinputs2
-0.3
7
V
Input current into any pin except supply pins
4)
Iin
-50
50
mA
Humidity – non-condensing
5)
H
Electrostatic discharge
6) – Human Body Model (HBM2)
VHBM
1500
V
Electrostatic discharge
7) – Equipment Discharge Model (EDM)
VEDM
200
V
Storage temperature
TSTG
-55
125
°C
Soldering temperature Sn/Pb
8)
Tlead
240
°C
Soldering temperature 100%Sn
8)
Tlead
260
°C
Thermal resistance of SOP 16 package
9)
Rthj-16
80
100
K/W
Thermal resistance of SOP 20 package
9)
Rthj-20
75
95
K/W
1)
Reverse polarity protection must be performed externally.
2)
VLTGP-LTGN and VLTGP-LTGN_P must not be violated.
3)
Pulse with
≤ 50µs, repetition rate ≤ 0.5 Hz.
4)
Latch-up resistance, reference pin is 0V.
5)
Level 4 according to JEDEC-020D is guaranteed.
6)
HBM: C = 100pF charged to VHBM2 with resistor R = 1.5k
Ω in series, valid for all pins except LTGP-LTGN.
7)
EDM: C = 200pF charged to VEDM with no resistor in series, valid for LTGP-LTGN only.
8)
Soldering must comply with the JEDEC-J-STD-020D standard.
9)
Single layer board, Ptot = 0.5W; air velocity = 0m/s ⇒ max. value; air velocity = 2.5m/s ⇒ min. value.


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