MLX71121

300 to 930MHz

FSK/OOK Receiver

39010 71121

Page 6 of 29

Data Sheet

Rev. 012

Mar/15

1.4

Operating Modes

The receiver offers two operating modes selectable by setting the corresponding logic level at pin ENRX.

ENRX

Description

0

Shutdown mode

1

Receive mode

Note:

ENRX is pulled down internally.

The receiver’s start-up procedure is controlled by a sequencer circuit. It performs the sequential activation of

the different building blocks. It also initiates the pre-charging of the data filter and data slicer capacitors in

order to reduce the overall start-up time and current consumption during the start-up phase.

At ENRX = 0, the receiver is in shutdown mode and draws only a few nA. The bias system and the reference

oscillator are activated after enabling the receiver by a positive edge at pin ENRX. The crystal oscillator (RO)

is turned on first. Then the crystal oscillation amplitude builds up from noise. After reaching a certain ampli-

event is used to start the pre-charging of the external data path capacitors. Pre-charging is finished after

5504 clock cycles. After that time the data output pin DTAO output is activated.

Fig. 2:

Timing diagram of start-up and shutdown behavior

1.5

LNA Selection

The receiver features two identical LNAs. Each LNA is a cascode amplifier with a voltage gain of approxi-

mately 18dB. The actual gain depends on the antenna matching network at the inputs and the LC tank net-

work between the LNA outputs and mixer input. LNA operation can be controlled by the LNASEL pin.

LNASEL

Description

0

LNA1 active, LNA2 shutdown

Hi-Z

LNA1 and LNA2 active

1

LNA1 shutdown, LNA2 active

Pin LNASEL is internally pulled to VCC/2 during receive mode. Therefore both LNAs are active if LNASEL is

left floating (Hi-Z state).

valid data

Hi-Z

Hi-Z

ENRX

DTAO

CC

I

SDN

I

RO

I

t

SEQ