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LMR23610AQDDARQ1 Datasheet(PDF) 3 Page - Texas Instruments |
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LMR23610AQDDARQ1 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 36 page  EN/SYNC AGND VIN PGND SW BOOT VCC FB Thermal Pad (9) 1 2 3 4 5 6 7 8 3 LMR23610-Q1 www.ti.com SNVSAR4 – DECEMBER 2016 Product Folder Links: LMR23610-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) A = Analog, P = Power, G = Ground 5 Pin Configuration and Functions DDA Package 8-Pin HSOIC Top View Pin Functions PIN I/O (1) DESCRIPTION NAME NO. SW 1 P Switching output of the regulator. Internally connected to both power MOSFETs. Connect to power inductor. BOOT 2 P Boot-strap capacitor connection for high-side driver. Connect a high quality 100 nF capacitor from BOOT to SW. VCC 3 P Internal bias supply output for bypassing. Connect a 2.2 μF/ 16 V or higher capacitance bypass capacitor from this pin to AGND. Do not connect external loading to this pin. Never short this pin to ground during operation. FB 4 A Feedback input to regulator, connect the feedback resistor divider tap to this pin. EN/SYNC 5 A Enable input to regulator. High = On, Low = Off. Can be connected to VIN. Do not float. Adjust the input under voltage lockout with two resistors. The internal oscillator can be synchronized to an external clock by coupling a positive pulse into this pin through a small coupling capacitor. See Enable/Sync for detail. AGND 6 G Analog ground pin. Ground reference for internal references and logic. Connect to system ground. VIN 7 P Input supply voltage. PGND 8 G Power ground pin, connected internally to the low side power FET. Connect to system ground, PAD, AGND, ground pins of CIN and COUT. Path to CIN must be as short as possible. PAD 9 G Low impedance connection to AGND. Connect to PGND on PCB. Major heat dissipation path of the die. Must be used for heat sinking to ground plane on PCB. |
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