 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
SCAN25100_0611 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
|
|
||||||||||||||||||||||||||||||
SCAN25100_0611 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
|
|
1 / 14 page  November 2006 SCAN25100 2457.6, 1228.8, and 614.4 Mbps CPRI SerDes with Auto RE Sync and Precision Delay Calibration Measurement General Description The SCAN25100 is a 2457.6, 1228.8, and 614.4 Mbps seri- alizer/deseralizer (SerDes) for high-speed bidirectional serial data transmission over FR-4 printed circuit board backplanes, balanced cables, and optical fiber. The SCAN25100 inte- grates precision delay calibration measurement (DCM) cir- cuitry that measures link delay components to better than ± 800 ps accuracy. The SCAN25100 features independent transmit and receive PLLs, on-chip oscillator, and intelligent clock management circuitry to automatically perform remote radio head synchro- nization and reduce the cost and complexity of external clock networks. The SCAN25100 is programmable though an MDIO interface as well as through pins, featuring configurable transmitter de- emphasis, receiver equalization, speed rate selection, inter- nal pattern generation/verification, and loop back modes. In addition to at-speed BIST, the SCAN25100 includes IEEE 1149.1 and 1149.6 testability. Note: For a full datasheet of the SCAN25100 please con- tact your local National Semiconductor representitive. Features ■ Exceeds LV and HV CPRI voltage and jitter requirements ■ 2457.6, 1228.8, and 614.4 Mbps operation ■ Integrated delay calibration measurement (DCM) directly measures T14 and Toffset delays to ≤ ± 800 ps ■ DCM also measures chip and other delays to ≤ ± 1200 ps accuracy ■ Deterministic chip latency ■ Automatic receiver lock and RE synchronization without reference clock or external crystal ■ Independent transmit and receive PLLs for seamless RE synchronization ■ Low noise recovered clock output ■ Requires no jitter cleaning in single-hop applications ■ >8 kV ESD on the CML IO, >7 kV on all other pins, >2 kV CDM ■ Hot plug protection ■ LOS, LOF, 8b/10b line code violation, comma, and receiver PLL lock reporting ■ Programmable hyperframe length and start of hyperframe character ■ Programmable transmit de-emphasis and receive equalization with on-chip termination ■ Advanced testability features — IEEE 1149.1 and 1149.6 — At-speed BIST pattern generator/verifier — Multiple loopback modes ■ 1.8V or 3.3V compatible parallel bus interface ■ 100-pin TQFP package with exposed dap ■ Industrial –40 to +85° C temperature range Block Diagram 20183442 © 2006 National Semiconductor Corporation 201834 www.national.com |
Similar Part No. - SCAN25100_0611 |
|
Similar Description - SCAN25100_0611 |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
