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EM47EM1688SBB-125EA Datasheet(PDF) 11 Page - Eorex Corporation |
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EM47EM1688SBB-125EA Datasheet(HTML) 11 Page - Eorex Corporation |
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11 / 39 page  Single-ended levels for CK, DQS, /CK, /DQS Note1. For CK, /CK use VIH/VIL(AC) of address/command; for strobes (DQS, DQS) use VIH/VIL(AC) of DQs. EM47EM1688SBB Note that while Address/command and DQ signal requirements are with respect to VREF, the single-ended components of differential signals have a requirement with respect to VDD/2; this is nominally the same. The transition of single-ended signals through the AC-levels is used to measure setup time. For singleended components of differential signals the requirement to reach VSEL max, VSEH min has no bearing on timing, but adds a restriction on the common mode characteristics of these signals. Note2. VIH(AC)/VIL(AC) for DQs is based on VREFDQ; VIH(AC)/VIL(AC) for address/command is based on VREFCA; if a reduced AC-high or AC-low level is used for a signal group, then the reduced level applies also here. Note3. These values are not defined, however the single-ended components of differential signals CK, /CK, DQS, /DQS need to be within the respective limits (VIH(DC) max, VIL(DC) min) for single-ended signals as well as the limitations for overshoot and undershoot. Oct. 2013 11/39 www.eorex.com Symbol Parameter Min. Max. Units Note VSEH Single-ended high-level for strobes (VDD/2)+0.175 VDDQ V 1,2 Single-ended high-level for CK, /CK (VDD/2)+0.175 VDD V 1,2 VSEL Single-ended low-level for strobes VSSQ (VDD/2)-0.175 V 1,2 Single-ended low-level for CK, /CK VSS (VDD/2)-0.175 V 1,2 |
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