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DSP56002FC40 Datasheet(PDF) 8 Page - Motorola, Inc |
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DSP56002FC40 Datasheet(HTML) 8 Page - Motorola, Inc |
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8 / 110 page  1-2 DSP56002/D, Rev. 3 MOTOROLA Signal/Pin Descriptions Introduction Figure 1-1 Signals Identified by Functional Group DSP56002 24 16 Synchronous Serial Interface (SSI) Port2 Timer/ Event Counter OnCE Port 4 Serial Communications Interface (SCI) Port2 3 2 3 4 5 4 6 2 Interrupt/ Mode Control Host Interface (HI) Port1 8 3 3 Note: 1. The Host Interface port signals are multiplexed with the Port B GPIO signals (PB0–PB15). 2. The SCI and SSI signals are multiplexed with the Port C GPIO signals (PC0–PC8). 3. Power and Ground lines are indicated for the 144-pin TQFP package. AA1081G VCCP VCCCK VCCQ VCCA VCCD VCCC VCCH VCCS GNDP GNDCK GNDQ GNDA GNDD GNDC GNDH GNDS EXTAL XTAL CKOUT CKP PCAP PINIT PLOCK A0–A15 D0–D23 PS DS X/Y BS BR BG BN WT RD WR MODA MODB MODC RESET H0–H7 HA0–HA2 HR/W HEN HREQ HACK RXD TXD SCLK SC0–SC2 SCK SRD STD TIO DSCK DSI DSO DR Power Inputs: PLL Clock Output Internal Logic Address Bus Data Bus Bus Control HI SSI/SCI Grounds: PLL Clock Internal Logic Address Bus Data Bus Bus Control HI SSI/SCI PLL and Clock External Address Bus External Data Bus External Bus Control PB0–PB7 PB8–PB10 PB11 PB12 PB13 PB14 PC0 PC1 PC2 PC3–PC5 PC6 PC7 PC8 Port B Port C OS1 OS0 Status IRQA IRQB NMI Interrupt |
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