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DSP56300FM Datasheet(PDF) 7 Page - Motorola, Inc |
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DSP56300FM Datasheet(HTML) 7 Page - Motorola, Inc |
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7 / 128 page  Signal Groupings Freescale Semiconductor PRELIMINARY 7 PH0 Input, output, or disconnected Port H0—When the MODA/IRQA is configured as GPIO, this signal is individually programmable as input, output, or internally disconnected. MODB/IRQB Input MODB Input Mode Select B/External Interrupt Request B—MODB/IRQB is an active-low Schmitt-trigger input, internally synchronized to the DSP clock. MODB/IRQB selects the initial chip operating mode during hardware reset and becomes a level-sensitive or negative-edge- triggered, maskable interrupt request input during normal instruction processing. This pin can also be programmed as GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip operating modes, latched into OMR when the RESET signal is de-asserted. This pin has an internal pull up resistor. This input is 5 V tolerant. PH1 Input, output, or disconnected Port H1—When the MODB/IRQB is configured as GPIO, this signal is individually programmable as input, output, or internally disconnected. MODC/IRQC Input MODC Input Mode Select C/External Interrupt Request C—MODC/IRQC is an active-low Schmitt-trigger input, internally synchronized to the DSP clock. MODC/IRQC selects the initial chip operating mode during hardware reset and becomes a level-sensitive or negative-edge- triggered, maskable interrupt request input during normal instruction processing. This pin can also be programmed as GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip operating modes, latched into OMR when the RESET signal is de-asserted. This pin has an internal pull up resistor. This input is 5 V tolerant. PH2 Input, output, or disconnected Port H2—When the MODC/IRQC is configured as GPIO, this signal is individually programmable as input, output, or internally disconnected. MODD/IRQD Input MODD Input Mode Select D/External Interrupt Request D—MODD/IRQD is an active-low Schmitt-trigger input, internally synchronized to the DSP clock. MODD/IRQD selects the initial chip operating mode during hardware reset and becomes a level-sensitive or negative-edge- triggered, maskable interrupt request input during normal instruction processing. This pin can also be programmed as GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip operating modes, latched into OMR when the RESET signal is de-asserted. This pin has an internal pull up resistor. This input is 5 V tolerant. PH3 Input, output, or disconnected Port H3—When the MODD/IRQD is configured as GPIO, this signal is individually programmable as input, output, or internally disconnected. Table 8. Interrupt and Mode Control (Continued) Signal Name Type State during Reset Signal Description |
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