MCP4801 datasheet(6/50 Pages) MICROCHIP

Part #	MCP4801

Description	SPI Interface with 20 MHz Clock Support

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Manufacturer	MICROCHIP [Microchip Technology]

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MCP4802/4812/4822

DS20002249B-page 6

 2010-2015 Microchip Technology Inc.

Output Amplifier

Output Swing

VOUT

—

0.01 to

VDD – 0.04

—

V

Accuracy is better than 1 LSb

for

VOUT = 10 mV to (VDD –

40 mV)

Phase Margin

PM

—

66

—

Degree (°)

CL= 400 pF, RL = 

Slew Rate

SR

—

0.55

—

V/µs

Short Circuit Current

ISC

—17

—

mA

Settling Time

tSETTLING

—

4.5

—

µs

Within 1/2 LSb of final value

from 1/4 to 3/4 full-scale range

Dynamic Performance (Note 2)

DAC-to-DAC Crosstalk

—

<10

—

nV-s

Major Code Transition

Glitch

—

45

—

nV-s

1 LSb change around major

carry (0111...1111 to

1000...0000

)

Digital Feedthrough

—

<10

—

nV-s

Analog Crosstalk

—

<10

—

nV-s

AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS)

Electrical Specifications: Unless otherwise indicated, VDD = 2.7V – 5.5V, TA= -40 to +125°C.

Typical values are at +25°C.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Schmitt Trigger High-Level

Input Voltage

(All digital input pins)

VIH

0.7 VDD

——

V

Schmitt Trigger Low-Level

Input Voltage

(All digital input pins)

VIL

——

0.2 VDD

V

Hysteresis of Schmitt Trigger

Inputs

VHYS

—0.05 VDD

—V

Input Leakage Current

ILEAKAGE

-1

—

1

ALDAC = CS = SDI = SCK =

VDD or VSS

Digital Pin Capacitance

(All inputs/outputs)

CIN,

COUT

—10

—

pF

VDD = 5.0V, TA = +25°C,

fCLK = 1 MHz (Note 1)

Clock Frequency

FCLK

——

20

MHz

TA = +25°C (Note 1)

Clock High Time

tHI

15

—

ns

Note 1

Clock Low Time

tLO

15

—

ns

Note 1

CS Fall to First Rising CLK

Edge

tCSSR

40

—

ns

Applies only when CS falls with

CLK high. (Note 1)

Data Input Setup Time

tSU

15

—

ns

Note 1

Data Input Hold Time

tHD

10

—

ns

Note 1

SCK Rise to CS Rise Hold

Time

tCHS

15

—

ns

Note 1

Note 1:

This parameter is ensured by design and not 100% tested.

ELECTRICAL CHARACTERISTIC WITH EXTENDED TEMPERATURE (CONTINUED)

Electrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = 2.048V, Output Buffer Gain (G) = 2x,

RL = 5 k to GND, CL = 100 pF. Typical values are at +125°C by characterization or simulation.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Note 1:

Guaranteed monotonic by design over all codes.

2:

This parameter is ensured by design, and not 100% tested.

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