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MC74HC112ADR2G Datasheet(PDF) 2 Page - ON Semiconductor |
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MC74HC112ADR2G Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 7 page MC74HC112A http://onsemi.com 2 Figure 1. Pin Assignment Figure 2. Logic Diagram RESET 1 J1 CLOCK 1 K1 SET 1 Q1 Q1 Q2 Q2 RESET 2 J2 CLOCK 2 K2 SET 2 4 2 1 3 15 6 5 9 7 14 11 13 12 10 PIN 16 = VCC PIN 8 = GND 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 K2 CLOCK 2 RESET 2 RESET 1 VCC Q2 SET 2 J2 K1 CLOCK 1 J1 SET 1 Q1 Q1 Q2 GND FUNCTION TABLE Inputs Outputs Set Reset Clock J K Q Q L H XXX H L H L XXX L H L L X X X L* L* H H L L No Change H H LH LH H H HL HL H H H H Toggle H H L X X No Change H H H X X No Change H H X X No Change *Both outputs will remain low as long as Set and Reset are low, but the output states are unpre- dictable if Set and Reset go high simultaneously. ORDERING INFORMATION Device Package Shipping† MC74HC112ADG SOIC−16 (Pb−Free) 48 Units / Rail MC74HC112ADR2G SOIC−16 (Pb−Free) 2500 Units / Reel MC74HC112ADTR2G TSSOP−16* 2500 Units / Reel MC74HC112ADTG TSSOP−16 (Pb−Free) 96 Units / Tube †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. |
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