72V3672L10PQFG datasheet(7/29 Pages) IDT

Part #	72V3672L10PQFG

Description	3.3 VOLT CMOS SyncBiFIFO

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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COMMERCIALTEMPERATURERANGE

IDT72V3652/72V3662/72V3672 3.3V CMOS SyncBiFIFOTM

2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2

FEBRUARY 4, 2009

DETERMINING ACTIVE CURRENT CONSUMPTION AND POWER DISSIPATION

The ICC(f) current for the graph in Figure 1 was taken while simultaneously reading and writing a FIFO on the IDT72V3652/72V3662/72V3672 with

CLKA and CLKB set to fS. All data inputs and data outputs change state during each clock cycle to consume the highest supply current. Data outputs were

disconnected to normalize the graph to a zero capacitance load. Once the capacitance load per data-output channel and the number of these device's

inputs driven by TTL HIGH levels are known, the power dissipation can be calculated with the equation below.

CALCULATING POWER DISSIPATION

With ICC(f) taken from Figure 1, the maximum power dissipation (PT) of these FIFOs may be calculated by:

PT = VCC x ICC(f) +

Σ(CL x VCC2 X fo)

N

where:

N = number of outputs = 36

CL = outputcapacitanceload

fo = switching frequency of an output

Figure 1. Typical Characteristics: Supply Current (ICC) vs. Clock Frequency (fS)

4660 drw03

A35

A34

A33

A32

VCC

A31

A30

GND

A29

A28

A27

A26

A25

A24

A23

FWFT

A22

VCC

A21

A20

A19

A18

GND

A17

A16

A15

A14

A13

VCC

A12

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2

3

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10

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13

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16

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19

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21

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B35

B34

B33

B32

GND

B31

B30

B29

B28

B27

B26

VCC

B25

B24

GND

B23

B22

B21

B20

B19

B18

GND

B17

B16

VCC

B15

B14

B13

B12

GND

90

89

88

87

86

85

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82

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