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72V281L20PFG8 Datasheet(PDF) 7 Page - Integrated Device Technology |
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72V281L20PFG8 Datasheet(HTML) 7 Page - Integrated Device Technology |
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7 / 26 page  7 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES IDT72V281/72V291 3.3V CMOS SUPERSYNC FIFOTM 65,536 x 9 and 131,072 x 9 When configured in IDT Standard mode, the EF and FF outputs are double register-buffered outputs. Relevant timing diagrams for IDT Standard mode can be found in Figure 7, 8 and 11. FIRST WORD FALL THROUGH MODE (FWFT) In this mode, the status flags, IR, PAF, HF, PAE, and OR operate in the manner outlined in Table 2. To write data into to the FIFO, WEN must be LOW. Data presented to the DATA IN lines will be clocked into the FIFO on subsequent transitions of WCLK. After the first write is performed, the Output Ready (OR) flag will go LOW. Subsequent writes will continue to fill up the FIFO. PAE will go HIGH after n + 2 words have been loaded into the FIFO, where n is the empty offset value. The default setting for this value is stated in the footnote of Table 2. This parameter is also user program- mable. See section on Programmable Flag Offset Loading. If one continued to write data into the FIFO, and we assumed no read operations were taking place, the HF would toggle to LOW once the 32,770th word for the IDT72V281 and 65,538th word for the IDT72V291, respectively was written into the FIFO. Continuing to write data into the FIFO will cause the PAF to go LOW. Again, if no reads are performed, the PAFwillgoLOWafter(65,537-m)writesfortheIDT72V281 and(131,073-m) writesfortheIDT72V291,wheremisthefulloffsetvalue. Thedefaultsetting for this value is stated in the footnote of Table 2. When the FIFO is full, the Input Ready (IR) flag will go HIGH, inhibiting further write operations. If no reads are performed after a reset, IR will go HIGH after D writes to the FIFO. D = 65,537 writes for the IDT72V281 and 131,073 writes for the IDT72V291, respectively. Note that the additional word in FWFT mode is due to the capacity of the memory plus output register. If the FIFO is full, the first read operation will cause the IRflagtogoLOW. Subsequent read operations will cause the PAF and HF to go HIGH at the conditions described in Table 2. If further read operations occur, without write operations, the PAE will go LOW when there are n + 1 words in the FIFO, where n is the empty offset value. Continuing read operations will cause the FIFO to become empty. When the last word has been read from the FIFO, OR will go HIGH inhibiting further read operations. REN is ignored when the FIFO is empty. When configured in FWFT mode, the OR flag output is triple register- buffered, and the IR flag output is double register-buffered. Relevant timing diagrams for FWFT mode can be found in Figure 9, 10 and 12. PROGRAMMING FLAG OFFSETS Full and Empty Flag offset values are user programmable. The IDT72V281/72V291 has internal registers for these offsets. Default settings are stated in the footnotes of Table 1 and Table 2. Offset values can be programmed into the FIFO in one of two ways; serial or parallel loading method. The selection of the loading method is done using the LD (Load) pin. During Master Reset, the state of the LD input determines whether serial or parallel flag offset programming is enabled. A HIGH on LD during Master Reset selects serial loading of offset values and in addition, sets a default PAE offset value of 3FFH (a threshold 1,023 words from the empty boundary), and a default PAF offset value of 3FFH (a threshold 1,023 words from the full boundary). A LOW on LD during Master Reset selects parallel loading of offset values, and in addition, sets a default PAE offset value of 07FH (a threshold 127 words from the empty boundary), and a default PAF offset value of 07FH (a threshold 127 words from the full boundary). See Figure 3, Offset Register Location and Default Values. FUNCTIONAL DESCRIPTION TIMING MODES: IDT STANDARD vs FIRST WORD FALL THROUGH (FWFT) MODE The IDT72V281/72V291 support two different timing modes of opera- tion: IDT Standard mode or First Word Fall Through (FWFT) mode. The selection of which mode will operate is determined during Master Reset, by the state of the FWFT/SI input. If, at the time of Master Reset, FWFT/SI is LOW, then IDT Standard mode will be selected. This mode uses the Empty Flag (EF) to indicate whether or not there are any words present in the FIFO. It also uses the Full Flag function (FF) to indicate whether or not the FIFO has any free space for writing. In IDT Standard mode, every word read from the FIFO, including the first, must be requested using the Read Enable (REN) and RCLK. If, at the time of Master Reset, FWFT/SI is HIGH, then FWFT mode will be selected. This mode uses Output Ready (OR) to indicate whether or not there is valid data at the data outputs (Qn). It also uses Input Ready (IR) to indicate whether or not the FIFO has any free space for writing. In the FWFT mode, the first word written to an empty FIFO goes directly to Qn after three RCLK rising edges, REN = LOW is not necessary. Subsequent words must be accessed using the Read Enable (REN) and RCLK. Various signals, both input and output signals operate differently de- pending on which timing mode is in effect. IDT STANDARD MODE In this mode, the status flags, FF, PAF, HF, PAE, and EF operate in the manner outlined in Table 1. To write data into to the FIFO, Write Enable (WEN) must be LOW. Data presented to the DATA IN lines will be clocked intotheFIFOonsubsequenttransitionsoftheWriteClock(WCLK).Afterthe first write is performed, the Empty Flag (EF) will go HIGH. Subsequent writes will continue to fill up the FIFO. The Programmable Almost-Empty flag (PAE) will go HIGH after n + 1 words have been loaded into the FIFO, where n is the empty offset value. The default setting for this value is stated in the footnote of Table 1. This parameter is also user programmable. See section on Programmable Flag Offset Loading. If one continued to write data into the FIFO, and we assumed no read operations were taking place, the Half-Full flag (HF) would toggle to LOW once the 32,769th word for IDT72V281 and 65,537th word for IDT72V291 respectively was written into the FIFO. Continuing to write data into the FIFO will cause the Programmable Almost-Full flag (PAF) to go LOW. Again, if no reads are performed, the PAF will go LOW after (65,536-m) writes for the IDT72V281 and (131,072-m) writes for the IDT72V291. The offset “m” is the full offset value. The default setting for this value is stated in the footnote of Table 1. This parameter is also user programmable. See section on Programmable Flag Offset Loading. When the FIFO is full, the Full Flag (FF) will go LOW, inhibiting further write operations. If no reads are performed after a reset, FF will go LOW after D writes to the FIFO. D = 65,536 writes for the IDT72V281 and 131,072 for the IDT72V291, respectively. If the FIFO is full, the first read operation will cause FF to go HIGH. Subsequent read operations will cause PAF and HF to go HIGH at the conditions described in Table 1. If further read operations occur, without write operations, PAE will go LOW when there are n words in the FIFO, where n is the empty offset value. Continuing read operations will cause the FIFO to become empty. When the last word has been read from the FIFO, the EFwillgoLOWinhibitingfurtherreadoperations. RENisignoredwhen the FIFO is empty. |
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