Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

72V841L15TFGI8 Datasheet(PDF) 7 Page - Integrated Device Technology

Part # 72V841L15TFGI8
Description  3.3 VOLT DUAL CMOS SyncFIFO
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

72V841L15TFGI8 Datasheet(HTML) 7 Page - Integrated Device Technology

Back Button 72V841L15TFGI8 Datasheet HTML 3Page - Integrated Device Technology 72V841L15TFGI8 Datasheet HTML 4Page - Integrated Device Technology 72V841L15TFGI8 Datasheet HTML 5Page - Integrated Device Technology 72V841L15TFGI8 Datasheet HTML 6Page - Integrated Device Technology 72V841L15TFGI8 Datasheet HTML 7Page - Integrated Device Technology 72V841L15TFGI8 Datasheet HTML 8Page - Integrated Device Technology 72V841L15TFGI8 Datasheet HTML 9Page - Integrated Device Technology 72V841L15TFGI8 Datasheet HTML 10Page - Integrated Device Technology 72V841L15TFGI8 Datasheet HTML 11Page - Integrated Device Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 16 page
background image
7
IDT72V801/72V8211/72V821/72V831/72V841/72V851 3.3V DUAL CMOS SyncFIFOTM
DUAL 256 x 9, DUAL 512 x 9, DUAL 1K x 9, DUAL 2K x 9, DUAL 4K x 9, DUAL 8K x 9
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
Figure 3. Offset Register Formats and Default Values for the A and B FIFOs
containsfour8-bitoffsetregisterswhichcanbeloadedwithdataontheinputs,
orreadontheoutputs. SeeFigure3fordetailsofthesizeoftheregistersand
thedefaultvalues.
IfFIFOA(B)isconfiguredtohaveprogrammableflags,whentheWENA1
(WENB1)andWENA2/LDA(WENB2/LDB)aresetLOW,dataontheDA(DB)
inputsarewrittenintotheEmpty(LeastSignificantBit)Offsetregisteronthefirst
LOW-to-HIGH transition of the WCLKA (WCLKB). Data are written into the
Empty (Most Significant Bit) Offset register on the second LOW-to-HIGH
transitionofWCLKA(WCLKB),intotheFull(LeastSignificantBit)Offsetregister
onthethirdtransition,andintotheFull(MostSignificantBit)Offsetregisteron
thefourthtransition. ThefifthtransitionofWCLKA(WCLKB)againwritestothe
Empty(LeastSignificantBit)Offsetregister.
87
0
Empty Offset (LSB) Reg.
Default Value 007H
80
Full Offset (LSB) Reg.
Default Value 007H
7
80
Empty Offset (LSB)
Default Value 007H
80
Full Offset (LSB)
Default Value 007H
72V801 - 256 x 9 x 2
72V811 - 512 x 9 x 2
7
7
80
(MSB)
1
0
0
87
0
Empty Offset (LSB) Reg.
Default Value 007H
80
Full Offset (LSB) Reg.
Default Value 007H
7
80
Empty Offset (LSB)
Default Value 007H
80
Full Offset (LSB)
Default Value 007H
72V831 - 2,048 x 9 x 2
7
7
80
80
(MSB)
0000
2
(MSB)
000
3
80
80
(MSB)
0000
2
(MSB)
000
3
80
8
0
80
(MSB)
1
0
87
0
Empty Offset (LSB) Reg.
Default Value 007H
80
Full Offset (LSB) Reg.
Default Value 007H
7
72V821 - 1,024 x 9 x 2
80
(MSB)
00
1
80
(MSB)
00
1
4093 drw 05
72V841 - 4,096 x 9 x 2
80
Empty Offset (LSB)
Default Value 007H
80
Full Offset (LSB)
Default Value 007H
7
7
80
(MSB)
00000
4
72V851 - 8,192 x 9 x 2
(MSB)
00000
80
4
However,writingalloffsetregistersdoesnothavetooccuratonetime. One
or two offset registers can be written and then by bringing LDA(LDB) HIGH,
FIFOA(B)isreturnedtonormalread/writeoperation.WhenLDA(LDB)isset
LOW, and WENA1 (WENB1) is LOW, the next offset register in sequence is
written.
ThecontentsoftheoffsetregisterscanbereadontheQA(QB)outputswhen
WENA2/LDA (WENB2/LDB) is set LOW and both Read Enables RENA1,
RENA2(RENB1,RENB2)aresetLOW. DatacanbereadontheLOW-to-HIGH
transition of the Read Clock RCLKA (RCLKB).
A read and write should not be performed simultaneously to the offset
registers.


Similar Part No. - 72V841L15TFGI8

ManufacturerPart #DatasheetDescription
logo
Renesas Technology Corp
72V841L15TFGI8 RENESAS-72V841L15TFGI8 Datasheet
327Kb / 17P
   3.3 VOLT DUAL CMOS SyncFIFO™ DUAL 256 X 9, DUAL 512 X 9, DUAL 1,024 X 9, DUAL 2,048 X 9, DUAL 4,096 X 9 , DUAL 8,192 X 9
MARCH 2018
More results

Similar Description - 72V841L15TFGI8

ManufacturerPart #DatasheetDescription
logo
Integrated Device Techn...
IDT72V801 IDT-IDT72V801 Datasheet
150Kb / 16P
   3.3 VOLT DUAL CMOS SyncFIFO?
IDT72V805 IDT-IDT72V805_16 Datasheet
200Kb / 26P
   3.3 VOLT CMOS DUAL SyncFIFO
IDT72V3611 IDT-IDT72V3611_14 Datasheet
334Kb / 19P
   3.3 VOLT CMOS SyncFIFO
IDT72V205 IDT-IDT72V205_13 Datasheet
401Kb / 25P
   3.3 VOLT CMOS SyncFIFO
IDT72V3631 IDT-IDT72V3631_14 Datasheet
394Kb / 20P
   3.3 VOLT CMOS SyncFIFO
IDT72V201 IDT-IDT72V201_13 Datasheet
285Kb / 14P
   3.3 VOLT CMOS SyncFIFO
IDT72V3623 IDT-IDT72V3623_15 Datasheet
213Kb / 28P
   3.3 VOLT CMOS SyncFIFO WITH
logo
Renesas Technology Corp
IDT72V201 RENESAS-IDT72V201 Datasheet
349Kb / 15P
   3.3 VOLT CMOS SyncFIFO™
MARCH 2018
logo
Integrated Device Techn...
IDT72V3611 IDT-IDT72V3611 Datasheet
200Kb / 20P
   3.3 VOLT CMOS SyncFIFO 64 x 36
IDT72V3683 IDT-IDT72V3683 Datasheet
341Kb / 30P
   3.3 VOLT CMOS SyncFIFO WITH BUS-MATCHING
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com