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70V08S20PFGI8 Datasheet(PDF) 5 Page - Integrated Device Technology

Part # 70V08S20PFGI8
Description  HIGH-SPEED 3.3V 64K x 8 DUAL-PORT STATIC RAM
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

70V08S20PFGI8 Datasheet(HTML) 5 Page - Integrated Device Technology

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5
IDT70V08S/L
High-Speed 3.3V 64K x 8 Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range(1,6) (VDD
DD
DD
DD
DD
= 3.3V ± 0.3V)
NOTES:
1. 'X' in part numbers indicates power rating (S or L)
2. VDD = 3.3V, TA = +25°C, and are not production tested. IDD DC = 90mA (Typ.)
3. At f = fMAX
, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions" of input levels of GND
to 3V.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
6. Refer to Chip Enable Truth Table.
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD
DD
DD
DD
DD
= 3.3V ± 0.3V)
NOTES:
1. At VDD
< 2.0V, input leakages are undefined.
2. Refer to Chip Enable Truth Table.
Symbol
Parameter
Test Conditions
70V08S
70V08L
Unit
Min.
Max.
Min.
Max.
|ILI|
Input Leakage Current(1)
VDD = 3.6V, VIN = 0V to VDD
___
10
___
5µA
|ILO|
Output Leakage Current
CE(2)
= VIH, VOUT = 0V to VDD
___
10
___
5µA
VOL
Output Low Voltage
IOL = +4mA
___
0.4
___
0.4
V
VOH
Output High Voltage
IOH = -4mA
2.4
___
2.4
___
V
3740 tbl 09
Symbol
Parameter
Test Condition
Version
70V08X15
Com'l Only
Typ.(2) Max
70V08X20
Com'l & Ind
Typ.(2) Max
Unit
IDD
Dynamic Operating Current
(Both Ports Active)
CE
= VIL, Outputs Disabled
SEM
= VIH
f = fMAX(3)
COM'L
S
L
170
170
260
225
165
165
255
220
mA
IND
S
L
____
____
____
____
____
165
____
280
ISB1
Standby Current
(Both Ports - TTL Level
Inputs)
CEL
= CER = VIH
SEMR
= SEML = VIH
f = fMAX(3)
COM'L
S
L
44
44
70
60
39
39
60
50
mA
IND
S
L
____
____
____
____
____
39
____
65
ISB2
Standby Current
(One Port - TTL Level Inputs)
CE"A"
= VIL and CE"B" = VIH(5)
Active Port Outputs Disabled,
f=fMAX(3)
SEMR
= SEML = VIH
COM'L
S
L
115
115
160
145
105
105
155
140
mA
IND
S
L
____
____
____
____
____
105
____
155
ISB3
Full Standby Current (Both
Ports - All CMOS Level
Inputs)
Both Ports CEL and
CER
> VDD - 0.2V
VIN > VDD - 0.2V or
VIN < 0.2V, f = 0(4)
SEMR = SEML > VDD - 0.2V
COM'L
S
L
1.0
0.2
6
3
1.0
0.2
6
3
mA
IND
S
L
____
____
____
____
____
0.2
____
6
ISB4
Full Standby Current
(One Port - All CMOS Level
Inputs)
CE"A"
< 0.2V and
CE"B"
> VDD - 0.2V(5)
SEMR
= SEML > VDD - 0.2V
VIN > VDD - 0.2V or VIN < 0.2V
Active Port Outputs Disabled
f = fMAX(3)
COM'L
S
L
115
115
155
140
105
105
150
135
mA
IND
S
L
____
____
____
____
____
105
____
150
3740 tbl 10a


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