Electronic Components Datasheet Search |
|
72V205L15TFGI Datasheet(PDF) 1 Page - Integrated Device Technology |
|
72V205L15TFGI Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 25 page 1 MARCH 2013 IDT72V205, IDT72V215, IDT72V225, IDT72V235, IDT72V245 IDT, IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncFIFO is a trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ©2013 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-4294/7 3.3 VOLT CMOS SyncFIFOTM 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18, and 4,096 x 18 FEATURES: ••••• 256 x 18-bit organization array (IDT72V205) ••••• 512 x 18-bit organization array (IDT72V215) ••••• 1,024 x 18-bit organization array (IDT72V225) ••••• 2,048 x 18-bit organization array (IDT72V235) ••••• 4,096 x 18-bit organization array (IDT72V245) ••••• 10 ns read/write cycle time ••••• 5V input tolerant ••••• IDT Standard or First Word Fall Through timing ••••• Single or double register-buffered Empty and Full flags ••••• Easily expandable in depth and width ••••• Asynchronous or coincident Read and Write Clocks ••••• Asynchronous or synchronous programmable Almost-Empty and Almost-Full flags with default settings ••••• Half-Full flag capability ••••• Output enable puts output data bus in high-impedance state ••••• High-performance submicron CMOS technology ••••• Available in a 64-lead thin quad flatpack (TQFP/STQFP) FUNCTIONAL BLOCK DIAGRAM INPUT REGISTER OUTPUT REGISTER RAM ARRAY 256 x 18, 512 x 18 1,024 x 18, 2,048 x 18 4,096 x 18 OFFSET REGISTER FLAG LOGIC FF/IR PAF EF/OR PAE HF/(WXO) READ POINTER READ CONTROL LOGIC WRITE CONTROL LOGIC WRITE POINTER EXPANSION LOGIC RESET LOGIC WEN WCLK D0-D17 LD RS ( HF)/WXO WXI REN RCLK OE Q0-Q17 RXO RXI FL 4294 drw 01 ••••• Industrial temperature range (–40 °°°°°C to +85°°°°°C) is available ••••• Green parts available, see ordering information DESCRIPTION: TheIDT72V205/72V215/72V225/72V235/72V245arefunctionallycom- patibleversionsoftheIDT72205LB/72215LB/72225LB/72235LB/72245LB, designed to run off a 3.3V supply for exceptionally low power consumption. These devices are very high-speed, low-power First-In, First-Out (FIFO) memories with clocked read and write controls. These FIFOs are applicable forawidevarietyofdatabufferingneeds,suchasopticaldiskcontrollers,Local AreaNetworks(LANs),andinterprocessorcommunication. TheseFIFOshave18-bitinputandoutputports. Theinputportiscontrolled byafree-runningclock(WCLK),andaninputenablepin(WEN).Dataisread intothesynchronousFIFOoneveryclockwhenWENisasserted.Theoutput portiscontrolledbyanotherclockpin(RCLK)andanotherenablepin(REN). TheReadClock(RCLK)canbetiedtotheWriteClockforsingleclockoperation orthetwoclockscanrunasynchronousofoneanotherfordual-clockoperation. AnOutputEnablepin(OE)isprovidedonthereadportforthree-statecontrol oftheoutput. |
Similar Part No. - 72V205L15TFGI |
|
Similar Description - 72V205L15TFGI |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |