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70V631S12BCG Datasheet(PDF) 8 Page - Integrated Device Technology |
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70V631S12BCG Datasheet(HTML) 8 Page - Integrated Device Technology |
8 / 23 page IDT70V631S High-Speed 3.3V 256K x 18 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges 8 DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range (VDD = 3.3V ± 150mV) NOTE: 1. At VDD < - 2.0V input leakages are undefined. 2. VDDQ is selectable (3.3V/2.5V) via OPT pins. Refer to p.5 for details. Symbol Parameter Test Conditions 70V631S Unit Min. Max. |ILI| Input Leakage Current(1) VDDQ = Max., VIN = 0V to VDDQ ___ 10 µA |ILO| Output Leakage Current CE0 = VIH or CE1 = VIL, VOUT = 0V to VDDQ ___ 10 µA VOL (3.3V) Output Low Voltage(2) IOL = +4mA, VDDQ = Min. ___ 0.4 V VOH (3.3V) Output High Voltage(2) IOH = -4mA, VDDQ = Min. 2.4 ___ V VOL (2.5V) Output Low Voltage(2) IOL = +2mA, VDDQ = Min. ___ 0.4 V VOH (2.5V) Output High Voltage(2) IOH = -2mA, VDDQ = Min. 2.0 ___ V 5622 tbl 09 DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(3) (VDD = 3.3V ± 150mV) NOTES: 1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, using "AC TEST CONDITIONS" at input levels of GND to 3V. 2. f = 0 means no address or control lines change. Applies only to input at CMOS level standby. 3. Port "A" may be either left or right port. Port "B" is the opposite from port "A". 4. VDD = 3.3V, TA = 25°C for Typ, and are not production tested. IDD DC(f=0) = 120mA (Typ). 5. CEX = VIL means CE0X = VIL and CE1X = VIH CEX = VIH means CE0X = VIH or CE1X = VIL CEX < 0.2V means CE0X < 0.2V and CE1X > VDDQ - 0.2V CEX > VDDQ - 0.2V means CE0X > VDDQ - 0.2V or CE1X - 0.2V "X" represents "L" for left port or "R" for right port. 70V631S10 Com'l Only 70V631S12 Com'l & Ind 70V631S15 Com'l Symbol Parameter Test Condition Version Typ.(4) Max. Typ.(4) Max. Typ.(4) Max. Unit IDD Dynamic Operating Current (Both Ports Active) CEL and CER= VIL, Outputs Disabled, f = fMAX(1) COM'L S 340 500 315 465 300 440 mA IND S ____ ____ 365 515 ____ ____ ISB1 Standby Current (Both Ports - TTL Level Inputs) CEL = CER = VIH f = fMAX(1) COM'L S 115 165 90 125 75 100 mA IND S ____ ____ 115 150 ____ ____ ISB2 Standby Current (One Port - TTL Level Inputs) CE"A" = VIL and CE"B" = VIH(5) Active Port Outputs Disabled, f=fMAX(1) COM'L S 225 340 200 325 175 315 mA IND S ____ ____ 225 365 ____ ____ ISB3 Full Standby Current (Both Ports - CMOS Level Inputs) Both Ports CEL and CER > VDDQ - 0.2V, VIN > VDDQ - 0.2V or VIN < 0.2V, f = 0(2) COM'L S 315 3 15 315 mA IND S ____ ____ 615 ____ ____ ISB4 Full Standby Current (One Port - CMOS Level Inputs) CE"A" < 0.2V and CE"B" > VDDQ - 0.2V(5) VIN > VDDQ - 0.2V or VIN < 0.2V, Active Port, Outputs Disabled, f = fMAX(1) COM'L S 220 335 195 320 170 310 mA IND S ____ ____ 220 360 ____ ____ 5622 tbl 10 |
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