6

IDT723622/723632/723642 CMOS SyncBiFIFO™

256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

COMMERCIALTEMPERATURERANGE

DETERMINING ACTIVE CURRENT CONSUMPTION AND POWER DISSIPATION

disconnected to normalize the graph to a zero capacitance load. Once the capacitance load per data-output channel and the number of these device's

inputs driven by TTL HIGH levels are known, the power dissipation can be calculated with the equation below.

CALCULATING POWER DISSIPATION

where:

N

=

number of outputs = 36

=

increase in power supply current for each input at a TTL HIGH level

dc

=

duty cycle of inputs at a TTL HIGH level of 3.4 V

=

outputcapacitanceload

fo

=

switchingfrequencyofanoutput

010

20

30

40

50

60

70

0

50

100

250

300

⎯ Clock Frequency ⎯ MHz

°C

3022 drw 03a

200

150

80

90