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72805LB10BGGI8 Datasheet(PDF) 7 Page - Integrated Device Technology

Part # 72805LB10BGGI8
Description  CMOS DUAL SyncFIFO
Download  26 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

72805LB10BGGI8 Datasheet(HTML) 7 Page - Integrated Device Technology

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COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72805LB/72815LB/72825LB/72845LB CMOS Dual SyncFIFOTM
256 x 18, 512 x 18, 1,024 x 18, and 4,096 x 18
FUNCTIONALDESCRIPTION
TIMING MODES: IDT STANDARD vs FIRST WORD FALL THROUGH
(FWFT) MODE
TheIDT72805LB/72815LB/72825LB/72845LBsupporttwodifferenttiming
modes of operation. The selection of which mode will operate is determined
duringconfigurationatReset(RS).DuringaRSoperation,theFirstLoad(FL),
Read Expansion Input ( RXI)andWriteExpansionInput(WXI)pinsareused
toselectthetimingmodeperthetruthtableshowninTable3.InIDTStandard
Mode,thefirstwordwrittentoanemptyFIFOwillnotappearonthedataoutput
lines unless a specific read operation is performed. A read operation, which
consists of activating Read Enable (REN) and enabling a rising Read Clock
(RCLK)edge,willshiftthewordfrominternalmemorytothedataoutputlines.
InFWFTmode,thefirstwordwrittentoanemptyFIFOisclockeddirectlytothe
dataoutputlinesafterthreetransitionsoftheRCLKsignal.ARENdoesnothave
to be asserted for accessing the first word.
Varioussignals,bothinputandoutputsignalsoperatedifferentlydepending
onwhichtimingmodeisineffect.
IDT STANDARD MODE
In this mode, the status flags, FF, PAF, HF, PAE and EF operate in the
manner outlined in Table 1. To write data into to the FIFO, Write Enable
(WEN) must be LOW. Data presented to the DATA IN lines will be clocked
intotheFIFOonsubsequenttransitionsoftheWriteClock(WCLK).Afterthe
first write is performed, the Empty Flag (EF) will go HIGH. Subsequent
writes will continue to fill up the FIFO. The Programmable Almost-Empty
flag (PAE) will go HIGH after n + 1 words have been loaded into the FIFO,
where n is the Empty offset value. The default setting for this value is stated
in the footnote of Table 1. This parameter is also user programmable. See
section on Programmable Flag Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the Half-Full flag (HF) would toggle to LOW
once the 129th (IDT72805LB), 257th (IDT72815LB), 513th (IDT72825LB),
and 2,049th (IDT72845LB) word respectively was written into the FIFO.
ContinuingtowritedataintotheFIFOwillcausetheProgrammableAlmost-Full
flag (PAF) to go LOW. Again, if no reads are performed, the PAFwillgoLOW
after(256-m)writesfortheIDT72805LB,(512-m)writesfortheIDT72815LB,
(1,024-m)writesfortheIDT72825LB,and(4,096–m)writesfortheIDT72845LB.
Theoffset“m”istheFulloffsetvalue.Thisparameterisalsouserprogrammable.
See section on Programmable Flag Offset Loading. If there is no Full offset
specified,thePAFwillbeLOWwhenthedeviceis31awayfromcompletelyfull
forIDT72805LB,63awayfromcompletelyfullforIDT72815LB,and127away
fromcompletelyfullfortheIDT72825LB/72845LB.
WhentheFIFOisfull,theFullFlag(FF)willgoLOW,inhibitingfurtherwrite
operations.Ifnoreadsareperformedafterareset,FFwillgoLOWafterDwrites
totheFIFO.D=256writesfortheIDT72805LB,512fortheIDT72815LB,1,024
for the IDT72825LB, and 4,096 for the IDT72845LB, respectively.
If the FIFO is full, the first read operation will cause FF to go HIGH.
Subsequent read operations will cause PAF and the Half-Full flag (HF) to
go HIGH at the conditions described in Table 1. If further read operations
occur, without write operations, the Programmable Almost-Empty flag
(PAE) will go LOW when there are n words in the FIFO, where n is the Empty
offset value. If there is no Empty offset specified, the PAE will be LOW when
the device is 31 away from completely empty for IDT72805LB, 63 away from
completelyemptyforIDT72815LB,and127awayfromcompletelyemptyfor
IDT72825LB/72845LB.ContinuingreadoperationswillcausetheFIFOtobe
empty. When the last word has been read from the FIFO, the EF will go LOW
inhibiting further read operations. REN is ignored when the FIFO is empty.
FIRST WORD FALL THROUGH MODE (FWFT)
In this mode, the status flags, IR, PAF, HF, PAE and OR operate in the
manner outlined in Table 2. To write data into to the FIFO, WEN must be
LOW. Data presented to the DATA IN lines will be clocked into the FIFO on
subsequent transitions of WCLK. After the first write is performed, the
Output Ready (OR) flag will go LOW. Subsequent writes will continue to fill
up the FIFO. PAE will go HIGH after n + 2 words have been loaded into the
FIFO, where n is the Empty offset value. The default setting for this value
is stated in the footnote of Table 2. This parameter is also user program-
mable. See section on Programmable Flag Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the HF would toggle to LOW once the 130th
(72805LB),258th(72815LB),514th(72825LB),and2,050th(72845LB)word
respectivelywaswrittenintotheFIFO.ContinuingtowritedataintotheFIFO
will cause the PAF to go LOW. Again, if no reads are performed, the PAF will
go LOW after (257-m) writes for the IDT72805LB, (513-m) writes for the
IDT72815LB,(1,025-m)writesfortheIDT72825LB,and(4,097–m)writesfor
theIDT72845LB,wheremistheFulloffsetvalue.Thedefaultsettingforthisvalue
isstatedinthefootnoteofTable2.
WhentheFIFOisfull,theInputReady(IR)flagwillgoHIGH,inhibitingfurther
writeoperations.Ifnoreadsareperformedafterareset, IRwillgoHIGHafter
D writes to the FIFO. D = 257 writes for the IDT72805LB, 513 for the
IDT72815LB,1,025fortheIDT72825LB, and4,097fortheIDT72845LB.Note
thattheadditionalwordinFWFTmodeisduetothecapacityofthememoryplus
outputregister.
If the FIFO is full, the first read operation will cause the IR flag to go LOW.
Subsequent read operations will cause the PAF and HF to go HIGH at the
conditions described in Table 2. If further read operations occur, without
write operations, the PAE will go LOW when there are n + 1 words in the
FIFO, where n is the Empty offset value. If there is no Empty offset specified,
the PAE will be LOW when the device is 32 away from completely empty for
IDT72805LB, 64 away from completely empty for IDT72815LB, and 128
away from completely empty for IDT72825LB/72845LB. Continuing read
operationswillcausetheFIFOtobeempty.Whenthelastwordhasbeenread
from the FIFO, OR will go HIGH inhibiting further read operations. REN is
ignored when the FIFO is empty.
PROGRAMMABLE FLAG LOADING
Full and Empty flag Offset values can be user programmable. The
IDT72805LB/72815LB/72825LB/72845LB has internal registers for these
offsets.DefaultsettingsarestatedinthefootnotesofTable1andTable2.Offset
valuesareloadedintotheFIFOusingthedatainputlinesD0-D11.Toloadthe
offsetregisters,theLoad(LD)pinandWENpinmustbeheldLOW.Datapresent
on D0-D11will be transferred in to the Empty Offset register on the first LOW-
to-HIGHtransitionofWCLK.BycontinuingtoholdtheLDandWENpinlow,data
present on D0-D11 will be transferred into the Full Offset register on the next
transition of the WCLK. The third transition again writes to the Empty Offset
register.Writingalloffsetregistersdoesnothavetooccuratonetime.Oneor
two offset registers can be written and then by bringing the LD pin HIGH, the
FIFO is returned to normal read/write operation. When the LD pin and WEN
areagainsetLOW,thenextoffsetregisterinsequenceiswritten.
ThecontentsoftheoffsetregisterscanbereadonthedataoutputlinesQ0-
Q11 when the LD pin is set LOW and REN is set LOW. Data can then be read


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