6.42

IDT70261S/L

High-Speed 16K x 16 Dual-Port Static RAM with Interrupt

Industrial and Commercial Temperature Ranges

7

NOTES:

1. Timing depends on which signal is asserted last, OE, CE, LB, or UB.

2. Timing depends on which signal is de-asserted first CE, OE, LB, or UB.

has no relation to valid output data.

Timing of Power-Up Power-Down

R/

W

CE

ADDR

OE

UB, LB

3039 drw 05

(4)

(4)

(4)

(4)

(1)

(2)

(3, 4)

VALID DATA

(4)

CE

3039 drw 06

50%

50%

,