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7140LA55PGI8 Datasheet(PDF) 2 Page - Integrated Device Technology |
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7140LA55PGI8 Datasheet(HTML) 2 Page - Integrated Device Technology |
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2 / 21 page  IDT7130SA/LA and IDT7140SA/LA High-Speed 1K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges 2 Description The IDT7130/IDT7140 are high-speed 1K x 8 Dual-Port Static RAMs. The IDT7130 is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the IDT7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-or- more-bit memory system applications results in full-speed, error- free operation without the need for additional discrete logic. Both devices provide two independent ports with separate con- trol, address, and I/O pins that permit independent asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Fabricated using CMOS high-performance technology, these de- vices typically operate on only 550mW of power. Low-power (LA) versions offer battery backup data retention capability, with each Dual- Port typically consuming 200µW from a 2V battery. The IDT7130/IDT7140 devices are packaged in 48-pin sidebraze or plastic DIPs, LCCs, flatpacks, 52-pin PLCC, and 64-pin TQFP and STQFP. Military grade products are manufactured in compli- ance with the latest revision of MIL-PRF-38535 QML, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. Pin Configurations(1,2,3) NOTES: 1. All VCC pins must be connected to power supply. 2. All GND pins must be connected to ground supply. 3. L48 packagebodyisapproximately.57inx.57inx.68in. F48 packagebodyisapproximately.75inx.75inx.11in. 4. Thispackagecodeisusedtoreferencethepackagediagram. 7130/40 L48(4) 6 5 4 3 2 1 48 47 46 45 44 43 28 29 30 42 41 40 39 38 37 36 35 34 33 32 31 7 8 9 10 11 12 13 14 15 16 17 18 2689 drw 03L GND CER CEL OEL A0L OER I/O3L INTL BUSYL R/ WL R/ WR BUSYR INTR VCC I/O5R I/O4R I/O3R I/O2R I/O1R I/O0R I/O7L I/O6L I/O5L I/O4L 25 26 19 20 21 22 23 24 27 INDEX 6 5 4 3 2 1 48 47 46 45 44 43 28 29 30 42 41 40 39 38 37 36 35 34 33 32 31 7 8 9 10 11 12 13 14 15 16 17 18 2689 drw 03F GND CER CEL OEL A0L OER I/O3L INTL BUSYL R/ WL R/ WR BUSYR INTR VCC I/O5R I/O4R I/O3R I/O2R I/O1R I/O0R I/O7L I/O6L I/O5L I/O4L 25 26 19 20 21 22 23 24 27 7130/40 F48(4) |
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