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ICS501A-DPK Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICS501A-DPK Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 6 page LOCO™PLL Clock Multiplier MDS 501A B 2 Revision 120704 In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 297 -1 201 ● www.icst.com ICS501A Pin Assignment Clock Output Table 0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating) Pin Descriptions X1/ I CLK VDD GND OE S1 S0 CLK X2 1 2 3 4 8 7 6 5 8 Pi n ( 150 mil) SOIC S1 S0 CLK Minimum Input (MHz) 0 0 4X input 15 0 M 5.333X input 12 0 1 5X input 12 M 0 10X input 6 M M 2X input 30 M 1 12X input 5 1 0 6X input 10 1 M 3X input 20 1 1 8X input 10 Pin Number Pin Name Pin Type Pin Description 1 XI/ICLK Input Crystal connection or clock input. 2 VDD Power Connect to +3.3 V. 3 GND Power Connect to ground. 4 S1 Tri-level Iinput Select 1 for output clock. Connect to GND or VDD or float. 5 CLK Output Clock output per table above. 6 S0 Tri-level Input Select 0 for output clock. Connect to GND or VDD or float. 7 OE Input Output enable. Tri-states CLK output when low. Internal pull-up resistor. 8 X2 Output Crystal connection. Leave unconnected for clock input. |
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