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70V7339S166BFG8 Datasheet(PDF) 4 Page - Integrated Device Technology |
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70V7339S166BFG8 Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 22 page 6.42 4 IDT70V7339S High-Speed 512K x 18 Synchronous Bank-Switchable Dual-Port Static RAM Industrial and Commercial Temperature Ranges Pin Names Left Port Right Port Names CE0L, CE1L CE0R, CE1R Chip Enables R/WL R/WR Read/Write Enable OEL OER Output Enable BA0L - BA5L BA0R - BA5R Bank Address(4) A0L - A12L A0R - A12R Address I/O0L - I/O17L I/O0R - I/O17R Data Input/Output CLKL CLKR Clock PL/FTL PL/FTR Pipeline/Flow-Through ADSL ADSR Address Strobe Enable CNTENL CNTENR Counter Enable REPEATL REPEATR Counter Repeat(3) LBL , UBL LBR , UBR Byte Enables (9-bit bytes) VDDQL VDDQR Power (I/O Bus) (3.3V or 2.5V)(1) OPTL OPTR Option for selecting VDDQX(1,2) VDD Power (3.3V)(1) VSS Ground (0V) TDI Test Data Input TDO Test Data Output TCK Test Logic Clock (10MHz) TMS Test Mode Select TRST Reset (Initialize TAP Controller) 5628 tbl 01 NOTES: 1. VDD,OPTX,andVDDQXmustbesettoappropriateoperatinglevelspriortoapplyinginputs ontheI/Osandcontrolsforthatport. 2. OPTXselectstheoperatingvoltagelevelsfortheI/Osandcontrolsonthatport.IfOPTXis settoVIH(3.3V),thenthatport'sI/Osandcontrolswilloperateat3.3VlevelsandVDDQXmust besuppliedat3.3V.IfOPTXissettoVIL(0V),thenthatport'sI/Osandaddresscontrolswill operateat2.5VlevelsandVDDQXmustbesuppliedat2.5V.TheOPTpinsareindependent ofoneanother—bothportscanoperateat3.3Vlevels,bothcanoperateat2.5Vlevels,oreither canoperateat3.3Vwiththeotherat2.5V. 3. WhenREPEATXisasserted,thecounterwillresettothelastvalidaddressloadedviaADSX. 4. Accessesbytheportsintospecificbanksarecontrolledbythebankaddresspinsunder theuser'sdirectcontrol:eachportcanaccessanybankofmemorywiththesharedarray thatisnotcurrentlybeingaccessedbytheoppositeport(i.e.,BA0L-BA5L ≠BA0R-BA5R). Intheeventthatbothportstrytoaccessthesamebankatthesametime,neitheraccess willbevalid,anddataatthetwospecificaddressestargetedbytheportswithinthatbankmay becorrupted(inthecasethateitherorbothportsarewriting)ormayresultininvalidoutput (inthecasethatbothportsaretryingtoread). |
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