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70V3599S133DRG8 Datasheet(PDF) 1 Page - Integrated Device Technology |
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70V3599S133DRG8 Datasheet(HTML) 1 Page - Integrated Device Technology |
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1 / 23 page  ©20104 Integrated Device Technology, Inc. OCTOBER 2014 DSC 5617/10 1 Functional Block Diagram Features: ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location ◆ High-speed data access – Commercial: 3.6ns (166MHz)/4.2ns (133MHz) (max.) – Industrial: 4.2ns (133MHz) (max.) ◆ Selectable Pipelined or Flow-Through output mode ◆ Counter enable and repeat features ◆ Dual chip enables allow for depth expansion without additional logic ◆ Full synchronous operation on both ports – 6ns cycle time, 166MHz operation (12Gbps bandwidth) – Fast 3.6ns clock to data out – 1.7ns setup to clock and 0.5ns hold on all control, data, and address inputs @ 166MHz – Data input, address, byte enable and control registers – Self-timedwriteallowsfastcycletime ◆ Separate byte controls for multiplexed bus and bus matching compatibility ◆ Dual Cycle Deselect (DCD) for Pipelined Output mode ◆ LVTTL- compatible, 3.3V (±150mV) power supply for core ◆ LVTTL compatible, selectable 3.3V (±150mV) or 2.5V (±100mV) power supply for I/Os and control signals on each port ◆ Industrial temperature range (-40°C to +85°C) is available at 133MHz. ◆ Available in a 208-pin Plastic Quad Flatpack (PQFP), 208-pin fine pitch Ball Grid Array (fpBGA), and 256-pin Ball Grid Array (BGA) ◆ Supports JTAG features compliant with IEEE 1149.1 ◆ Green parts available, see ordering information HIGH-SPEED 3.3V 128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE IDT70V3599/89S REPEATR A16R(1) A0R CNTENR ADSR Dout0-8_R Dout9-17_R I/O0R - I/O35R Din_R ADDR_R OER BE3R BE2R BE1R BE0R R/ WR CE0R CE1R 1 0 1/0 FT/PIPER 1a 0a 1b 0b 1c 0c 1d 0d dc b a CLKR , Counter/ Address Reg. dc b a 0/1 0d 1d 0c 1c 0b 1b 0a 1a B W 2 R B W 1 R B W 0 R FT/PIPER Counter/ Address Reg. CNTENL ADSL REPEATL Dout0-8_L Dout9-17_L Dout18-26_L Dout27-35_L Dout18-26_R Dout27-35_R B W 0 L B W 1 L B W 2 L B W 3 L I/O0L -I/O35 L A16L(1) A0L Din_L ADDR_L OEL 5617 tbl 01 BE3L BE2L BE1L BE0L R/ WL CE0L CE1L 128K x 36 MEMORY ARRAY CLKL abcd FT/PIPEL 0/1 1d 0d 1c 0c 1b 0b 1a 0a B W 3 R JTAG TCK TRST TMS TDO TDI 1 0 1/0 0d 1d 0c 1c 0b 1b 0a 1a ab c d FT/PIPEL 1/0 1/0 NOTE: 1. A16 is a NC for IDT70V3589. |
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