MC54/74HC4060A

MOTOROLA

High–Speed CMOS Logic Data

DL129 — Rev 6

3–4

Symbol

Parameter

VCC

V

Guaranteed Limit

Unit

Symbol

Parameter

VCC

V

–55 to 25

°C

≤85°C

≤125°C

Unit

tTLH,

tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 4)

2.0

3.0

4.5

6.0

75

27

15

13

95

32

19

16

110

36

22

19

ns

Cin

Maximum Input Capacitance

10

10

10

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–

Speed CMOS Data Book (DL129/D).

* For TA = 25°C and CL = 50 pF, typical propagation delay from Clock to other Q outputs may be calculated with the following equations:

VCC = 2.0 V: tP = [93.7 + 59.3 (n–1)] ns

VCC = 4.5 V: tP = [30.25 + 14.6 (n–1)] ns

VCC = 3.0 V: tP = [61.5+ 34.4 (n–1)] ns

VCC = 6.0 V: tP = [24.4 + 12 (n–1)] ns

CPD

Power Dissipation Capacitance (Per Package)*

Typical @ 25

°C, VCC = 5.0 V

pF

CPD

Power Dissipation Capacitance (Per Package)*

35

pF

* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola High–Speed CMOS Data Book (DL129/D).

Symbol

Parameter

VCC

V

Guaranteed Limit

Unit

Symbol

Parameter

VCC

V

–55 to 25

°C

≤85°C

≤125°C

Unit

trec

Minimum Recovery Time, Reset Inactive to Clock

(Figure 2)

2.0

3.0

4.5

6.0

100

75

20

17

125

100

25

21

150

120

30

25

ns

tw

Minimum Pulse Width, Clock

(Figure 1)

2.0

3.0

4.5

6.0

75

27

15

13

95

32

19

16

110

36

23

19

ns

tw

Minimum Pulse Width, Reset

(Figure 2)

2.0

3.0

4.5

6.0

75

27

15

13

95

32

19

16

110

36

23

19

ns

tr, tf

Maximum Input Rise and Fall Times

(Figure 1)

2.0

3.0

4.5

6.0

1000

800

500

400

1000

800

500

400

1000

800

500

400

ns

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).