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S-8204AAD-TCT1y Datasheet(PDF) 10 Page - Seiko Instruments Inc |
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S-8204AAD-TCT1y Datasheet(HTML) 10 Page - Seiko Instruments Inc |
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10 / 34 page  BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK S-8204A Series Rev.3.5_00 10 3. 6 CDT pin detection voltage (VCDT) The CDT pin detection voltage (VCDT) is the voltage at the CDT pin when the DOP pin's voltage is set to "H" (voltage VDS × 0.9 V or more) after increasing the CDT pin's voltage gradually, after setting V1 = 1.5 V from the initial status. 3. 7 CIT pin detection voltage (VCIT) The CIT pin detection voltage (VCIT) is the voltage at the CIT pin when the DOP pin's voltage is set to "H" (voltage VDS × 0.9 V or more) after increasing the CIT pin's voltage gradually, after setting VVINI = VDIOV1 max. + 0.05 V from the initial status. 3. 8 Load short-circuit detection delay time (tSHORT) Load short-circuit detection delay time (tSHORT) is a period in which the DOP pin's voltage changes from "L" to "H" by changing the VINI pin's voltage instantaneously from the initial status to VSHORT max. + 0.05 V. 4. 0 V battery charge starting charger voltage (0 V battery charge function "available"), 0 V Battery charge inhibition battery voltage (0 V battery charge function "inhibition") (Test circuit 4) According to user's selection of the function to charge 0 V battery, either function of 0 V battery charge starting charger voltage or 0 V battery charge inhibition battery voltage is applied to each product. 4. 1 0 V battery charge starting charger voltage (V0CHA) (0V battery charge function "available") In this 0 V battery charge starting charger voltage, when V1 = V2 = V3 = V4 = 0 V, VVMP = V0CHA max., the COP pin's voltage is V0CHA max. − 1 V or less. 4. 2 0 V battery charge inhibition battery voltage (V0CHA) (0V battery charge function "inhibition") In this 0 V battery charge inhibition battery voltage, when V1 = V2 = V3 = V4 = V0INH min., VVMP = 22 V, the COP pin's voltage is VVMP − 1 V or more. 5. Resistance between VMP pin and VDD pin, resistance between VMP pin and VSS pin, VC1 pin current, VC2 pin current, VC3 pin current, VC4 pin current, CTLC pin current "H", CTLC pin current "L", CTLD pin current "H", CTLD pin current "L", SEL pin current "H", SEL pin current "L", COP pin leakage current, COP pin sink current, DOP pin source current, DOP pin sink current (Test circuit 5) Set VVMP = VSEL = VDD, VVINI = VCTLC = VCTLD = VSS, V1 = V2 = V3 = V4 = 3.5 V, set other pins open. (This status is referred to as initial status.) 5. 1 Resistance between VMP pin and VDD pin (RVMD) The value of resistance between VMP pin and VDD pin (RVMD) can be defined by RVMD = VDS / IVMD by using the VMP pin's current (IVMD) when VVINI = 1.5 V and VVMP = VSS after the initial status. 5. 2 Resistance between VMP pin and VSS pin (RVMS) The value of resistance between VMP pin and VSS pin (RVMS) can be defined by RVMS = VDS / IVMS by using the VMP pin's current (IVMS) when V1 = V2 = V3 = V4 = 1.8 V after the initial status. |
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