M3028 Series

SPECIFICATION FOR 5.0x7.0mm LVPECL/LVDS SMT VCXO

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The information contained herein is proprietary to MtronPTI and is submitted in confidence.

This information may not be copied or divulged without written permission from MtronPTI.

LVDS Electrical Specifications:

Parameter

Symbol

Min.

Typ.

Max.

Units

Conditions

Frequency of Operation

30

170

MHz

Frequency Stability

Frequency Stability

F/F

See ordering information

Aging

-5

+5

ppm

1

-3

+3

Per year thereafter

RF Output

Output Type

LVDS Compatible

Output Load

100 Ω Differential

V

Symmetry (duty cycle)

45

55

%

Ref. to 50% of waveform

Differential Output

Voltage

250

350

450

mV

peak-to-peak differential

output voltage

Output Offset Voltage

1.125

1.250

1.375

V

Rise/Fall Time

0.4

0.7

ns

20% to 80% of waveform

Start-up Time

10

ms

Enable Logic (Pad 2)

N/C

V

Output Enabled

Disable Logic (Pad 2)

V

Output Disabled to high-Z

Frequency Adjustment

Control Voltage

0.30

1.65

3.00

V

Pad 1

Absolute Pull Range

APR

See ordering information

Modulation Bandwidth

10

kHz

-3 dB

Input Impedance

100

kΩ

Pad 1

Linearity

10

%

Supply Voltage & Power Consumption

Operating Voltage

3.135

3.300

3.465

V

Supply Current

60

mA

Other Parameters

Phase Jitter (RMS)

0.2

ps

12 KHz to 20 MHz

156.25 MHz

Environmental & Packaging Requirements:

Storage Temperature

-55°C to 125°C

Mechanical Shock

Per MIL-STD-202, Method 213, Condition E

Vibration

Per MIL-STD-202, Method 204D, Condition D

Aging

+85°C ±3°C, 720H (No BIAS)

Humidity

+40°C ±2°CX90~95%, 96H (NO BIAS)

Thermal Cycle

Per MIL-STD-883, Method 1011, Condition A

Hermeticity

Per MIL-STD-202, Method 112 (1 x 10

Moisture Sensitivity Level

MSL1

Solderability

Per EIAJ-STD-002, Method 208

Max. Soldering Conditions

See solder profile, Figure 1

Pad Termination

Gold, 1 µm maximum thickness

Package Type

6-pad 5.0 X 7.0 mm leadless ceramic. RoHS compliant.