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UPSD3214BV-24T6T Datasheet(PDF) 2 Page - STMicroelectronics |
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UPSD3214BV-24T6T Datasheet(HTML) 2 Page - STMicroelectronics |
2 / 176 page µPSD323X 2/176 TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . .... . ... ... . . . .... .... .. . . . . . . . . . . . . . ... .. . . . . .... 11 µPSD323X Devices Product Matrix (Table 1.) . . . . . .... ... . ... . . .. .. .. .. . . . . . . ... . .... 12 TQFP52 Connections (Figure 3.) . . . . . . . . . . . . . .... . ... .. . . . . .... . . . ... . . . . . . . . .... . 12 TQFP80 Connections (Figure 4.) . . . . . . . . . . . . . .... . ... .. . . . . .... . . . ... . . . . . . . . .... . 13 80-Pin Package Pin Description (Table 2.) . . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... .. ... 14 52 PIN PACKAGE I/O PORT . . . . . . . . . . . . . . . . . . . . .... . . . ... . . . . . . . . . . . . . ... ... . . . .... 16 ARCHITECTURE OVERVIEW . . . . . . . . . . . . . . . . . . . .... . . . ... . . . . . . . . . . . . . ... ... . . . .... 17 Memory Organization . . . . . . . . . . . . . .... . . ... .. ... .. .. . . . . . . . . . . . . . . .... . . ... .. ... 17 Memory Map and Address Space (Figure 5.) . . . . . .... . . . . .. . . . . . . . . . . . . . ... .. . . . . .... 17 Registers . .... .... .. . .... .. . .... . ... .. . . . . .... . ... .. . . ... .. . . . . . . ... .. . . ... ... 17 8032 MCU Registers (Figure 6.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Configuration of BA 16-bit Registers (Figure 7.) . . . .... . ... .. . . ... .. . . . . . . ... .. . . ... ... 18 Stack Pointer (Figure 8.) . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . . . .... .... .. . .... .. . .... . 18 PSW (Program Status Word) Register (Figure 9.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Program Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... 19 Data memory . . .... .. . . . . . . . . .... . ... .. . . . . .... .... .. . .... .. . . . . . . ... .. . . . . . . . . 19 RAM.. . . .... . ... .. . . . . .... . . . . .. . . . . . . . . .... . ... .. .. .. . .... ... . . . . . . . . . . . . . . . 19 Interrupt Location of Program Memory (Figure 10.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 XRAM-DDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 XRAM-PSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . . . ... . . . . . . . . . . . . . ... ... . . . .... 19 SFR .. ... ... . . . .... . . . . ... . ... .. . . ... .. . .... . ... .. . . . . .... . . . ... . . . . . . . . .... . 20 RAM Address (Table 3.) . . . . . . . . . . . . . . . . . . . . .... . ... .. . . . . .... . . . ... . . . . . . . . .... . 20 Addressing Modes. . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . ... .. .. ... .. .. .... . . ... .. ... 20 Direct Addressing (Figure 11.). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . ... ... 20 Indirect Addressing (Figure 12.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Indexed Addressing (Figure 13.) . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . .. . ... .. ... 21 Arithmetic Instructions . . .... .. . .... . ... .. . . . . . ... . ... .. . . ... .. . .... . ... .. . . ... ... 21 Arithmetic Instructions (Table 4.). . . . . .... . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... .. ... 22 Logical Instructions . . . . .... .. . .... . ... .. . . . . . ... . ... .. . . ... .. . .... . ... .. . . ... ... 22 Logical Instructions (Table 5.) . . . . . . . . . . . . . ... . . . . . . . . . ... .. .. ... .. .. .... . . ... .. ... 23 Data Transfers. .... .. . . . . . . . . .... . ... .. . . . . .... .... .. . .... .. . . . . . . ... .. . . . . .... 24 Data Transfer Instructions that Access Internal Data Memory Space (Table 6.) . . . . . . ... .. ... 24 Shifting a BCD Number Two Digits to the Right (using direct MOVs: 14 bytes) (Table 7.) . . . .... 25 Shifting a BCD Number Two Digits to the Right (using direct XCHs: 9 bytes) (Table 8.) . . . . . . . . 25 Shifting a BCD Number One Digit to the Right (Table 9.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... 25 Data Transfer Instruction that Access External Data Memory Space (Table 10.) .... . . ... .. ... 26 Lookup Table READ Instruction (Table 11.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . . ... .. ... 26 Boolean Instructions . . . . . . . . . . .... . ... .. . . ... ... . ... .. .. ... .. . . ... . ... .. .. ... ... 27 Boolean Instructions (Table 12.) . . . . . . . . . . . . . . . . . . . . . .... .... ... . . . . . . . . ... .. . . ... . 27 Relative Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... 27 |
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