S-8250BAF-I6T1U datasheet(11/32 Pages) SII

Part #	S-8250BAF-I6T1U

Description	BATTERY PROTECTION IC FOR 1-CELL PACK

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Manufacturer	SII [Seiko Instruments Inc]

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BATTERY PROTECTION IC FOR 1-CELL PACK

Rev.1.1_02

S-8250B Series

11

8. Current consumption during power-down, current consumption during overdischarge

(Test circuit 3)

8. 1 With power-down function

The current consumption during power-down (IPDN) is IDD under the set condition of V1 = V2 = 1.5 V.

8. 2 Without power-down function

The current consumption during overdischarge (IOPED) is IDD under the set condition of V1 = V2 = 1.5 V.

9.

Resistance between VM pin and VDD pin

(Test circuit 3)

Resistance between VM pin and VDD pin is RVMD under the set conditions of V1 = 1.8 V, V2 = 0 V.

10. Resistance between VM pin and VSS pin (Release condition of discharge overcurrent status

"load disconnection")

(Test circuit 3)

Resistance between VM pin and VSS pin is RVMS under the set conditions of V1 = 3.4 V, V2 = 1.0 V.

11. CO pin resistance "H"

(Test circuit 4)

The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V,

V2 = 0 V, V3 = 3.0 V.

12. CO pin resistance "L"

(Test circuit 4)

The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.6 V,

V2 = 0 V, V3 = 0.4 V.

13. DO pin resistance "H"

(Test circuit 4)

The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V,

V2 = 0 V, V4 = 3.0 V.

14. DO pin resistance "L"

(Test circuit 4)

The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V,

V2 = 0 V, V4 = 0.4 V.

15. Overcharge detection delay time

(Test circuit 5)

The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" after the voltage V1 increases and

exceeds VCU under the set conditions of V1 = 3.4 V, V2 = 0 V.

16. Overdischarge detection delay time

(Test circuit 5)

The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases

and falls below VDL under the set conditions of V1 = 3.4 V, V2 = 0 V.

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