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ADS5103EVM Datasheet(PDF) 7 Page - Texas Instruments |
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ADS5103EVM Datasheet(HTML) 7 Page - Texas Instruments |
7 / 23 page ADS5102 ADS5103 SLAS351B – OCTOBER 2001 – REVISED DECEMBER 2001 7 www.ti.com electrical characteristics over recommended operating conditions, AVDD = DVDD = 1.8 V, DRVDD = 3.3 V, Fs = 40, 65 MSPS (as appropriate)/50% duty cycle, –1 dBFS input span, CL = 10 pF at D0–D9, internal reference, T(min) to T(max), typical data at 25°C (unless otherwise noted) (continued) timing characteristics PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Clock duty cycle 50 ±10 % td(o) Output propagation delay 9 12 ns t(en) OE ↓ to outputs enabled time 6 ns tdis OE ↑ rising to outputs 3-state disable time 10 ns td(latency) Pipeline latency 5.5 cyc td(ap) Aperture delay 1 ns Aperture uncertainty 2 ps rms timing diagram S2 S3 S1 S2 S3 12 3 4 56 7 8 9 10 td(latency) t(en) td(o) tdis Analog CLK OE D[0–9] S1 |
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