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KS0708 Datasheet(PDF) 8 Page - Samsung semiconductor |
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KS0708 Datasheet(HTML) 8 Page - Samsung semiconductor |
8 / 27 page PRELIMINARY SPECIFICATION 64COM/128SEG DRIVE FOR DOT MATRIX LCD KS0708 8 M/M-96-D001 97-09-19 FUNCTIONAL DESCRIPTION Chip Select input The KS0708 has two chip select pin, CS1B and CS2B. It can interface with a mircoprocessor when these pins(CS1B or CS2B)is Low. When both of these pins are set to High, DB0 to DB7 are high impedance and RS, RW, and E inputs are disabled. CS1B pin controls the display status of S1 to S64, and CS2B does that of S65 to S128. When CS1B and CS2B are Low at the same time, it is impossible to execute read operation. Therefore one of CS1B or CS2B should be set to Low((CS1B = ¡¨H¡¨& CS2B = ¡¨L¡¨)or (CS1B = ¡¨L¡¨ & CS2B = ¡¨H¡¨)) in read operation. The RESETB signal is entered independet of the sta- tus of Chip Select. CS1B CS2B Read Operation Write Operation CS1 CS2 CS1 CS2 H H X X X X L H ¡Û X ¡Û X H L X ¡Û X ¡Û L L - - ¡Û ¡Û ( - : Not Recommended, ¡Û : Operation, X : No Operation) Table 1. Relationship between Chip Select pins and Read/Write Operation Microprocessor Interface KS0708 transfers 8-bit parallel in either direction between the controlling microprocessor and the KS0708 through the 8-bit I/O buffer(DB0 TO DB7). RS, RW and E identify the type of parallel data transfer to be made as shown in table 2. RS RW Description H H Display data read H L Display data write L H Status read L L Writes to internal register (Instruction) Table 2. Microprocessor Interface |
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