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SiM3L136-C-GM Datasheet(PDF) 3 Page - Silicon Laboratories |
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SiM3L136-C-GM Datasheet(HTML) 3 Page - Silicon Laboratories |
3 / 3 page Process Change Notice #1302261 ____________________________________________________________________________________________________ W7206F1 Process Change Notice Form rev AH The information contained in this document is PROPRIETARY to Silicon Laboratories, Inc. and shall not be reproduced or used in part or whole without Silicon Laboratories’ written consent. The document is uncontrolled if printed or electronically saved. Pg 3 Appendix DOCUMENT CHANGE LIST Revision 0.4 to Revision 0.5 Changed 50 nA bullet on front overview to say 75 nA in PM8. Updated Figure 4.4, “SiM3L1xx Reset Sources Block Diagram,” on page 50. Table 3.5, “On-Chip Regulators,” on page 15: o Added input voltage range for internal LDO. o Added note that the internal LDO input voltage accounts for the dropout voltage. o Added digital LDO mins. o Added memory LDO min during normal operation. o Added note about setting the memory LDO equal or lower than the analog LDO. Table 3.7, “Internal Oscillators,” on page 18: o Added RTC external clock maximum frequency of 40 kHz. Changed two PM9 references to PM8 in System Overview. Updated 80BGA mechanical drawing to correct pin numbering. Removed TMS, TCK, and JTAG references from 64 and 40 pin packages. |
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