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LP3943ISQ Datasheet(PDF) 8 Page - National Semiconductor (TI) |
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LP3943ISQ Datasheet(HTML) 8 Page - National Semiconductor (TI) |
8 / 13 page Application Notes (Continued) AUTO INCREMENT Auto increment is a special feature supported by the LP3943 to eliminate repeated chip and register addressing when data are to be written to or read from registers in sequential order. The auto increment bit is inside the register address byte, as shown in Figure 6. Auto increment is enabled when this bit is programmed to “1” and disabled when it is pro- grammed to “0”. Bits 5, 6 and 7 in the register address byte should always be zero. In the READ mode, when auto increment is enabled, I 2C master could receive any number of bytes from LP3943 without selecting chip address and register address again. Every time the I 2C master reads a register, the LP3943 will increment the register address and the next data register will be read. When I 2C master reaches the last register (09H), the register address will roll over to 00H. In the WRITE mode, when auto increment is enabled, the LP3943 will increment the register address every time I 2C master writes to register. When the last register (09H regis- ter) is reached, the register address will roll over to 02H, not 00H, because the first two registers in LP3943 are read-only registers. It is possible to write to the first two registers independently, and the LP3943 will acknowledge, but the data will be ignored. If auto increment is disabled, and the I 2C master does not change register address, it will continue to write data into the same register. 20079611 FIGURE 6. Register Address Byte 20079612 FIGURE 7. Programming with Auto Increment Disabled (in WRITE Mode) 20079613 FIGURE 8. Programming with Auto Increment Enabled (in WRITE Mode) www.national.com 8 |
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