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S-89110ANC-1A1-TFZ Datasheet(PDF) 10 Page - Seiko Instruments Inc |
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S-89110ANC-1A1-TFZ Datasheet(HTML) 10 Page - Seiko Instruments Inc |
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10 / 34 page  MINI ANALOG SERIES CMOS OPERATIONAL AMPLIFIER S-89110/89120 Series Rev.3.1_01 10 Test Circuit (Per Circuit) 1. Power supply voltage rejection ratio, input offset voltage RF RS RS RF + − VOUT VDD VCMR = VDD / 2 • Power supply voltage rejection ratio (PSRR) The power supply voltage rejection ratio (PSRR) can be calculated by the following expression, with VOUT measured at each VDD. Test conditions: When VDD = 1.8 V: VDD = VDD1, VOUT = VOUT1, When VDD = 5.0 V: VDD = VDD2, VOUT = VOUT2 PSRR = 20 log VDD1 − VDD2 VOUT1 − VDD1 2 − VOUT2 − VDD2 2 × RF + RS RS • Input offset voltage (VIO) VIO = VOUT − VDD 2 × RS RF + RS Figure 8 2. Common-mode input signal rejection ratio, common-mode input voltage range RF RS RS RF + − VOUT VDD VIN VDD / 2 • Common-mode input signal rejection ratio (CMRR) The common-mode input signal rejection ratio (CMRR) can be calculated by the following expression, with VOUT measured at each VIN. Test conditions: When VIN = VCMR Max.: VIN = VIN1, VOUT = VOUT1, When VIN = VDD / 2: VIN = VIN2, VOUT = VOUT2 CMRR = 20 log VIN1 − VIN2 VOUT1 − VOUT2 × RF + RS RS • Common-mode input voltage range (VCMR) The common-mode input voltage range is the range of VIN in which VOUT satisfies the common-mode input signal rejection ratio specifications. Figure 9 |
Similar Part No. - S-89110ANC-1A1-TFZ |
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