ISL9238, ISL9238A

5

FN8877.2

November 9, 2016

Submit Document Feedback

13

ASGATE

Gate drive output to the P-channel adapter FET. The use of ASGATE FETs is optional, if it is not used, leave ASGATE pin

floating.

When ASGATE turns on, it is clamped 10V below ADP pin voltage.

14

CSIN

Adapter current sense “-” input.

15

CSIP

Adapter current sense “+” input. The modulator also uses this for sensing input voltage in forward mode and output

voltage in reverse mode.

16

ADP

Adapter input. Used to sense adapter voltage. When adapter voltage is higher than 3.2V, AGATE is turned on.

ADP pin is also one of the two internal low power LDO inputs.

17

DCIN

Input of an internal LDO providing power to the IC. Connect a diode OR from adapter and system outputs. Bypass this

pin with an MLCC capacitor.

18

VDD

Output of the internal LDO; provide the bias power for the internal analog and digital circuit. Connect a 1µF ceramic

capacitor to GND.

If VDD is pulled below 2V more than 1ms, ISL9238 and ISL9238A will reset all the SMBus register values to the default.

19

ACIN

Adapter voltage sense. Use a resistor divider externally to detect adapter voltage. The adapter voltage is valid if the ACIN

pin voltage is greater than 0.8V.

20

OTGEN/

CMIN

OTG function enable pin or stand-alone comparator input pin.

Pull high to enable OTG function. The OTG function is enabled when the control register is written to select OTG mode

and when the battery voltage is above 5.2V.

When OTG function is not selected, this pin is the general purpose stand-alone comparator input.

21

SDA

SMBus data I/O. Connect to the data line from the host controller or smart battery. Connect a 10k pull-up resistor

according to SMBus specification.

22

SCL

SMBus clock I/O. Connect to the clock line from the host controller or smart battery. Connect a 10k pull-up resistor

according to SMBus specification.

23

PROCHOT#

Open-drain output. Pulled low when ACHOT, DCHOT or Low_VSYS is detected. IMVP-8 compliant. SMBus command to

pull low with OTGCURRENT, BAGONE, ACOK, and general purpose comparator (refer to Table 15 on page 28).

24

ACOK

Adapter presence indicator output to indicate the adapter is ready.

25

BATGONE

Input pin to the IC. Logic high on this pin indicates the battery has been removed. Logic low on this pin indicates the

battery is present.

BATGONE pin logic high will force BGATE FET to turn-off in any circumstances.

26

OTGPG/

CMOUT

Open-drain output. OTG function output power-good indicator or the stand-alone comparator output.

When OTG function is enabled, low if OTG output voltage is not within regulation window.

When OTG function is not used, it is the general purpose comparator output.

27

PROG

A resistor from PROG pin to GND sets the following configurations:

1. Default number of the battery cells in series, 1-, 2-, 3-, or 4-cell.

2. Default switching frequency 733kHz or 1MHz.

3. Default adapter current limit value 0.476A or 1.5A.

4. Autonomous Charging mode enable or disable

Refer to Table 23 for programming options.

28

COMP

Error amplifier output. Connect a compensation network externally from COMP to GND.

29

AMON/

BMON

Adapter current, OTG output current, battery charging current, or battery discharging current monitor output.

30

PSYS

Current source output that indicates the whole platform power consumption.

PSYS gain = 1.44µA/W (default) or 0.723µA/W

31

VBAT

Battery voltage sensing. Used for trickle charging detection and Ideal Diode mode control. Connect to >1µF ceramic

capacitor from VBAT pin to GND.

VBAT pin is also one of the two internal low power LDO inputs.

32

BGATE

Gate drive output to the P-channel FET connecting the system and the battery. This pin can go high to disconnect the

battery, low to connect the battery or operate in a Linear mode to regulate trickle charge current during trickle charge.

When BGATE turns on, it is clamped 10V below VSYS pin voltage.

Pin Descriptions

PIN NUMBER

PIN NAME

DESCRIPTION