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ISL71090SEH12 Datasheet(PDF) 5 Page - Intersil Corporation

Part # ISL71090SEH12
Description  7.5V Radiation Hardened Ultra Low Noise, Precision Voltage Reference
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL71090SEH12 Datasheet(HTML) 5 Page - Intersil Corporation

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ISL71090SEH75
5
FN8591.3
March 18, 2016
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Absolute Maximum Ratings
Thermal Information
Maximum Voltage
VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +40V
VIN to GND at an LET = 86MeV•cm2/mg . . . . . . . . . . . . . . -0.5V to +36V
VOUT to GND (10s). . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to VOUT + 0.5V
Voltage on any Pin to Ground . . . . . . . . . . . . . . . . . -0.5V to +VOUT + 0.5V
Voltage on DNC Pins . . . . . . . . . . . . No connections permitted to these pins
ESD Ratings
Human Body Model (Tested per MIL-PRF-883 3015.7). . . . . . . . . . . 2kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . . 200V
Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . 750V
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
8 Ld Flatpack Package (Notes 3, 4). . . . . .
140
15
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Maximum Junction Temperature (TJMAX). . . . . . . . . . . . . . . . . . . . . .+150°C
Recommended Operating Conditions
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.2V to +30V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3.
JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. For
JC, the "case temp" location is the center of the ceramic on the package underside.
5. Product capability established by initial characterization. The "EH" version is acceptance tested on a wafer-by-wafer basis to 50krad(Si) at low dose rate.
6. The output capacitance used for SEE testing is CIN = 0.1µF and COUT = 1µF.
Electrical Specifications for Flatpack V
IN = 15V, IOUT = 0mA, CL = 0.1µF and CC = 1nF unless otherwise specified. Boldface
limits apply after radiation at +25°C and across the operating temperature range, -55°C to +125°C without radiation, unless otherwise specified.
PARAMETER
DESCRIPTION
TEST CONDITIONS
MIN
(Note 7)TYP
MAX
(Note 7)UNIT
VOUT
Output Voltage
7.5
V
VOA
VOUT Accuracy at TA = +25°C
VOUT = 7.5V, (Note 9)
-0.05
+0.05
%
VOUT Accuracy at TA = -55°C to +125°C VOUT = 7.5V, (Note 9)
-0.15
+0.15
%
VOUT Accuracy at TA = +25°C, Post
Radiation
VOUT = 7.5V, (Note 9)
-0.3
+0.3
%
TC VOUT
Output Voltage Temperature
Coefficient (Note 8)
10
ppm/°C
VIN
Input Voltage Range
9.2
30
V
IIN
Supply Current
0.930
1.500
mA
VOUT /VIN
Line Regulation
VIN = 9.2V to 30V
8
20
ppm/V
VOUT/IOUT
Load Regulation
Sourcing: 0mA ≤ IOUT ≤ 20mA
10
20
ppm/mA
Sinking: -10mA ≤ IOUT ≤ 0mA
21
40
ppm/mA
VD
Dropout Voltage (Note 10)1.5
1.7
V
ISC+
Short-Circuit Current
TA = +25°C, VOUT tied to GND
53
mA
ISC-
Short-Circuit Current
TA = +25°C, VOUT tied to VIN
-63
mA
tR
Turn-On Settling Time
90% of final value, CL = 1.0µF,
CC = open
250
µs
PSRR
Ripple Rejection
f = 120Hz
90
dB
eN
Output Voltage Noise
0.1Hz ≤ f ≤
10Hz
1.0
µVP-P
VN
Broadband Voltage Noise
10Hz ≤ f ≤
1kHz
1.2
µVRMS
Noise Density
f = 1kHz, VIN = 9.5V
38
nV/
Hz
VOUT/t
Long Term Drift
TA = +125°C, 1000hrs
15
ppm


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