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BUK100-50GS Datasheet(PDF) 7 Page - NXP Semiconductors |
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BUK100-50GS Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 11 page Philips Semiconductors Product specification PowerMOS transistor BUK100-50GS TOPFET Fig.14. Typical overload protection characteristics. Conditions: V DD = 13 V; VIS = 10 V; SC load = 30 mΩ Fig.15. Typical clamping characteristics, 25 ˚C. I D = f(VDS); conditions: VIS = 0 V; tp ≤ 50 µs Fig.16. Input threshold voltage. V IS(TO) = f(Tj); conditions: ID = 1 mA; VDS = 5 V Fig.17. Typical DC input characteristics, T j = 25 ˚C. I IS = f(VIS); normal operation Fig.18. Typical DC input characteristics, T j = 25 ˚C. I ISL = f(VIS); overload protection operated ⇒ ID = 0 A Fig.19. Typical reverse diode current, T j = 25 ˚C. I S = f(VSDS); conditions: VIS = 0 V; tp = 250 µs -60 -20 20 60 100 140 180 220 Tmb / C Energy & Time BUK100-50GS 1 0.5 0 Energy / J Time / ms Tj(TO) 0 2 4 6 8 10 12 14 BUK100-50GS VIS / V II / mA 1.0 0.5 0 50 60 70 BUK100-50GS VDS / V ID / A 20 15 10 5 0 typ. 0 2 4 6 8 10 12 14 VIS / V IIS / mA BUK100-50GS 5 4 3 2 1 0 PROTECTION LATCHED NORMAL RESET -60 -40 -20 0 20 40 60 80 100 120 140 Tj / C VIS(TO) / V 2 1 0 max. typ. min. 0 0.2 0.4 0.6 0.8 1 1.2 1.4 BUK100-50GS VSD / V IS / A 60 50 40 30 20 10 0 November 1996 7 Rev 1.300 |
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