FIGURE 2. EXAMPLE DESIGN USING ZL8101 AND ZL1505 DRIVER

NOTE:

21. The DDC bus requires a pull-up resistor. The resistance will vary based on the capacitive loading of the bus (and on the number of devices connected). The 10k default value, assuming a maximum

of 100pF per device, provides the necessary 1µs pull-up rise time. Please refer to the “Digital-DC Bus” section on page 30 for more information.

VOUT

C5

FB+

FB-

C4

BST

Q1

U1

ZL1505

HSEL

1

GH

2

SW

3

PWMH

4

PWML

5

LSEL

6

GND

7

GL

8

VDD

9

BST

10

EPAD

11

VIN = 4.5V-14V

VDRV = 4.5V-6.5V

SW

ISENB

C9

10µF

C2

4.7µF

C7

0.01µF

ISENA

PWML

DDC

C3

PG

R3

6.65k

SGND

SCL

R1

100k

EN

SDA

FB1

SGND

SGND

PWMH

C8

10µF

U2

ZL8101

DGND

1

SYNC

2

SA0

3

SA1

4

SCL

6

SDA

7

SALRT

8

FC

9

V0

10

V1

11

VMON

12

VTRK

14

FB+

15

FB-

16

NC

17

ISENB

18

ISENA

19

PWML

20

SGND

21

VR

23

VDD

24

V25

25

XTEMP

26

DDC

27

MGN

28

EN

30

SS

31

PG

32

NC

5

DRVCTL

13

PWMH

22

NC

29

SGND

33

C1

L1

R2

C6

DDCBus

(Note 21)