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P83C180 Datasheet(PDF) 9 Page - NXP Semiconductors |
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P83C180 Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 84 page 1997 Dec 12 9 Philips Semiconductors Product specification Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc. P83Cx80; P87C380 7 MEMORY ORGANIZATION The Central Processing Unit (CPU) manipulates operands in two memory spaces. There are 512 bytes of internal data memory, consisting of 256 bytes standard RAM and 256 bytes RAM buffer which is accessible as the Auxiliary RAM (AUX-RAM) or addressed through DDCADR and RAMBUF. The memory map and address spaces are shown in Fig.3. 7.1 Program memory The program memory consists of ROM: 8 kbytes (P83C880), 16 kbytes (P83C180), 24 kbytes (P83C280) and 32 kbytes (P83C380). The program memory implemented in the P87C380 is a 16 kbytes EPROM (OTP). 7.2 Internal data memory The internal data memory is divided into three physically separated parts: 256 bytes of RAM, 256 bytes of AUX-RAM, and a 128 bytes Special Function Registers (SFRs) area. These can be addressed each in a different way as described in Sections 7.2.1 to 7.2.3 and Table 3. Table 3 Internal data memory map Notes 1. RAM locations 0 to 127 can be addressed directly and indirectly as in the 80C51. 2. RAM locations 128 to 255 can only be addressed indirectly. MEMORY LOCATION ADDRESS MODE POINTERS DIRECT INDIRECT RAM 0 to 127(1) X X address pointers are R0 and R1 of the selected register bank 128 to 255(2) − X AUX-RAM 0 to 255 − X(3) address pointer DDCADR and RAMBUF SFRs 128 to 255 X −− andbook, full pagewidth MGG028 overlapped space 255 127 0 INTERNAL program memory area internal data memory area 32767(1) 24575(2) 16383(3) 8191(4) 0 INDIRECT ONLY INDIRECT ONLY DIRECT AND INDIRECT SPECIAL FUNCTION REGISTERS AUX-RAM BUFFER 255 0 Fig.3 Memory map and address spaces. (1) P83C380 and P87C380. (2) P83C280. (3) P380C180. (4) P83C880. |
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