LMK04610RTQT datasheet(10/124 Pages) TI1

Part #	LMK04610RTQT

Description	Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs

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Manufacturer	TI1 [Texas Instruments]

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10

LMK04610

SNAS699 – JANUARY 2017

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(1)

See test load description in Output Termination Scheme.

7.10 Clock Output Type Characteristics (CLKoutX)

(1)

3.135 V < VDD_PLL2OSC, VDD_PLL1, VDD_PLL2CORE, VDD_CORE < 3.465 V; 1.7 V < VDD_IO, VDD_OSC, VDDO_x <

3.465 V; –40°C < TA < 85°C and TPCB ≤ 105°C. Typical values at VDD_PLL2OSC, VDD_PLL1, VDD_PLL2CORE,

VDD_CORE = 3.3 V, VDD_IO, VDD_OSC, VDDOx = 1.8 V, TA = 25°C, at the Recommended Operating Conditions and are

not assured.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fCLKout

Output frequency

4-mA HSDS

1000

MHz

6-mA HSDS

1500

MHz

8-mA HSDS

2000

MHz

16-mA HCSL

1500

MHz

ODC

Output duty cycle

4-mA HSDS

45%

50%

55%

6-mA HSDS

45%

50%

55%

8-mA HSDS

45%

50%

55%

8-mA HSDS, >1.5 GHz

40%

60%

16-mA HCSL

45%

50%

55%

TR

Output rise time

245.76 MHz, 20%

to 80%,

RL = 100 Ω

4-mA HSDS

148

ps

6-mA HSDS

164

ps

8-mA HSDS

148

ps

16-mA HCSL

73

ps

T F

Output fall time

245.76 MHz, 80%

to 20%,

RL = 100 Ω

4-mA HSDS

149

ps

6-mA HSDS

163

ps

8-mA HSDS

146

ps

16-mA HCSL

74

ps

VOH

Output high voltage

4-mA HSDS

0.5

0.75

V

6-mA HSDS

0.72

1.06

V

8-mA HSDS

0.75

1.3

V

16-mA HSCL

0.75

1.04

V

VOL

Output low voltage

4-mA HSDS

0.1

0.18

V

6-mA HSDS

0.15

0.26

V

8-mA HSDS

0.17

0.31

V

16-mA HSCL

0.0

0.05

V

VOD

Differential output voltage

4-mA HSDS

958

mVpp

6-mA HSDS

1380

mVpp

8-mA HSDS

1544

mVpp

16-mA HSCL

1807

mVpp

ΔVOD

Change in VOD for complementary

output states

4-mA HSDS

–15

15

mVpp

6-mA HSDS

–20

20

mVpp

8-mA HSDS

–90

115

mVpp

16-mA HCSL

–15

15

mVpp

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