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ADRF5021BCCZN-R7 Datasheet(PDF) 6 Page - Analog Devices

Part # ADRF5021BCCZN-R7
Description  Silicon SPDT Switch
Download  12 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADRF5021BCCZN-R7 Datasheet(HTML) 6 Page - Analog Devices

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ADRF5021
Data Sheet
Rev. A | Page 6 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
GND
RFC
GND
GND
GND
EN
VSS
CTRL
VDD
1
2
3
4
5
67
8
9
10
11
12
13
14
15
16
17
18
19
20
ADRF5021
TOP VIEW
(Not to Scale)
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED
TO THE RF/DC GROUND OF THE PRINTED
CIRCUIT BOARD (PCB).
Figure 5. Pin Configuration (Top View)
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 2, 4 to 7, 9, 10,
13, 16, 17, 19, 20
GND
Ground. These pins must be connected to the RF/dc ground of the printed circuit board (PCB).
3
RFC
RF Common Port. This pin is dc-coupled to 0 V and ac matched to 50 Ω. No dc blocking capacitor is
necessary when the RF line potential is equal to 0 V dc. See Figure 6 for the interface schematic.
8
RF1
RF1 Port. This pin is dc-coupled to 0 V and ac matched to 50 Ω. No dc blocking capacitor is necessary
when the RF line potential is equal to 0 V dc. See Figure 6 for the interface schematic.
11
VDD
Positive Supply Voltage.
12
CTRL
Control Input. See Figure 7 for the interface schematic.
14
EN
Enable Input. See Figure 7 for the interface schematic.
15
VSS
Negative Supply Voltage.
18
RF2
RF2 Port. This pin is dc-coupled to 0 V and ac matched to 50 Ω. No dc blocking capacitor is necessary
when the RF line potential is equal to 0 V dc. See Figure 6 for the interface schematic.
EPAD
Exposed Pad. The exposed pad must be connected to the RF/dc ground of the PCB.
INTERFACE SCHEMATICS
RFC,
RF1,
RF2
Figure 6. RFC, RF1, and RF2 Pins Interface Schematic
CTRL, EN
VDD
VDD
Figure 7. Digital Pins (CTRL and EN) Interface Schematic


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