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MK1707SLF Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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MK1707SLF Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 6 page Low EMI Clock Generator MDS 1707 G 2 Revision 032204 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com MK1707 Pin Assignment Spread Direction and Percentage Select Table 0 = connect to GND M = unconnected (floating) 1 = connect directly to VDD Pin Descriptions ICLK VDD GND S1 CLK S0 LEE SD 1 2 3 4 8 7 6 5 8 pin (150 mil) SOIC SD Pin 8 S1 Pin 7 S0 Pin 6 Spread Direction Spread Percentage (%) 00 0Down 0.6 00 MDown 0.8 00 1Down 1.25 0M 0 Down Center +0.5, -1.5 0M MDown 2 0M 1 Down Center +0.5, -2.5 01 0 Down Center +0.5, -3 01 MDown 5 01 1 Power Down - 10 0 Center ±0.35 10 M Center ±0.5 10 1 Center ±0.7 1M 0 Center ±0.8 1M M Center ±1.1 1M 1 Center ±1.4 11 0 Test Test 11 M Center ±2.5 11 1 Power Down - Pin Number Pin Name Pin Type Pin Description 1 ICLK Input Connect to graphics input clock. 2 VDD Power Connect to +3.3 V. 3 GND Power Connect to ground. 4 CLK Output Spread spectrum clock output per table above. 5 LEE Input Low EMI enable. Turns on spread spectrum when high. Internal pull-up resistor. 6 S0 Input Function select 0 input. Selects spread amount and direction per table above. Internal mid-level. 7 S1 Input Function select 1input. Selects spread amount and direction per table above. Internal mid-level. 8 SD Input Spread direction select input. Selects the direction of spread per table above. Internal pull-up resistor. |
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