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MT5C1008ECA-70 Datasheet(PDF) 4 Page - Austin Semiconductor |
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MT5C1008ECA-70 Datasheet(HTML) 4 Page - Austin Semiconductor |
4 / 17 page SRAM SRAM SRAM SRAM SRAM MT5C1008 Austin Semiconductor, Inc. MT5C1008 Rev. 6.5 7/02 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Note 5) (-55oC < T C < 125 oC & -40oC to +85oC; V CC = 5.0V +10%) MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES READ CYCLE READ cycle time tRC 12 15 20 25 35 45 ns Address access time tAA 12 15 20 25 35 45 ns Chip Enable access time tACE 12 15 20 25 35 45 ns Output hold from address change tOH 333333 ns Chip Enable to output in Low-Z tLZCE 333333 ns 4, 6, 7 Chip disable to output in High-Z tHZCE 7 7 8 10 15 20 ns 4, 6, 7 Output Enable access time tAOE 7 7 7 10 15 20 ns 4, 6, 7 Output Enable to output in Low-Z tLZOE 000000 ns Output disable to output in High-Z tHZOE 7 7 8 10 15 20 ns 4, 6, 7 WRITE CYCLE WRITE cycle time tWC 12 15 20 25 35 45 ns Chip Enable to end of write tCW 11 12 15 20 25 35 ns Address valid to end of write tAW 11 12 15 20 25 35 ns Address setup time tAS 000000 ns Address hold from end of write tAH 000005 ns WRITE pulse width tWP 11 12 15 20 25 35 ns Data setup time tDS 8 8 10 15 20 20 ns Data hold time tDH 000000 ns Write disable to output in Low-Z tLZWE 555555 ns 4, 6, 7 Write Enable to output in High-Z tHZWE 7 7 9 10 15 20 ns 4, 6, 7 DESCRIPTION -20 SYMBOL -25 -35 -45 -15 -12 |
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