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ZLED7001 Datasheet(PDF) 5 Page - Integrated Device Technology |
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ZLED7001 Datasheet(HTML) 5 Page - Integrated Device Technology |
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5 / 14 page  ZLED7001 Datasheet © 2016 Integrated Device Technology, Inc. 5 April 20, 2016 No. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT 1.3.6 PWMD pin input high voltage VENH 2 V 1.3.7 PWMD pin pull-up resistance REN 100 kΩ 1.3.8 Current sense threshold voltage VCSTH 215 240 265 mV 1.3.9 LD pin voltage low threshold VLDL 50 mV 1.3.10 LD pin voltage high threshold VLDH 240 mV 1.3.11 Current sense blanking interval TBLANK 400 480 550 ns 1.3.12 Output delay tDELAY VCS = VCSTH + 50mV, after TBLANK 30 ns 1.3.13 OFF time TOFF TOFF pin floating 480 510 550 ns 1.3.14 GATE output rise time tRISE CGATE = 500pF 19 ns 1.3.15 GATE output fall time tFALL CGATE = 500pF 29 ns 1.3.16 REF pin voltage VREF 1.12 1.20 1.30 V 1.3.17 REF pin load current IREF 0.5 mA 1.3.18 Load regulation of reference voltage VREFLOAD IREF = 0 to 500µA, PWMD = 5.0V 0.5 5 mV |
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