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ADA4895-2ARMZ-R7 Datasheet(PDF) 7 Page - Analog Devices |
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ADA4895-2ARMZ-R7 Datasheet(HTML) 7 Page - Analog Devices |
7 / 24 page Data Sheet ADA4895-1/ADA4895-2 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating Supply Voltage 11 V Power Dissipation See Figure 4 Common-Mode Input Voltage −VS − 0.7 V to +VS + 0.7 V Differential Input Voltage ±0.7 V Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +125°C Lead Temperature (Soldering 10 sec) 300°C Junction Temperature 150°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, θJA is specified for a device soldered in a circuit board for surface-mount packages. Table 6 lists the θJA for the ADA4895-1/ADA4895-2. Table 6. Thermal Resistance Package Type θJA Unit 8-Lead Single SOIC 133 °C/W 6-Lead Single SOT-23 150 °C/W 10-Lead Dual MSOP 210 °C/W MAXIMUM POWER DISSIPATION The maximum safe power dissipation for the ADA4895-1/ ADA4895-2 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4895-1/ ADA4895-2. Exceeding a junction temperature of 175°C for an extended period of time can result in changes in silicon devices, potentially causing degradation or loss of functionality. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the die due to the ADA4895-1/ADA4895-2 drive at the output. PD = Quiescent Power + (Total Drive Power − Load Power) The quiescent power dissipation is the voltage between the supply pins (±VS) multiplied by the quiescent current (IS). ( ) L OUT L OUT S S S D R V R V V I V P 2 2 − × + × = Consider rms output voltages. If RL is referenced to −VS, as in single-supply operation, the total drive power is VS × IOUT. In single-supply operation with RL referenced to −VS, the worst case is VOUT = VS/2. If the rms signal levels are indeterminate, consider the worst case, when VOUT = VS/4 with RL referenced to midsupply. ( ) ( ) L S S S D R V I V P 2 4 / + × = Airflow increases heat dissipation, effectively reducing θJA. Also, more metal directly in contact with the package leads reduces θJA. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature on a JEDEC standard, 4-layer board. θJA values are approximations. 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) ADA4895-1 (SOIC) ADA4895-1 (SOT-23) ADA4895-2 (MSOP) Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board ESD CAUTION Rev. B | Page 7 of 24 |
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