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AD5675RBRUZ Datasheet(PDF) 4 Page - Analog Devices |
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AD5675RBRUZ Datasheet(HTML) 4 Page - Analog Devices |
4 / 32 page AD5671R/AD5675R Data Sheet Rev. B | Page 4 of 32 Parameter Min Typ Max Unit Test Conditions/Comments LOGIC INPUTS2 Input Current ±1 µA Per pin Input Voltage Low, VINL 0.3 × VLOGIC V High, VINH 0.7 × VLOGIC V Pin Capacitance 3 pF LOGIC OUTPUTS (SDA)2 Output Voltage Low, VOL 0.4 V ISINK = 200 μA High, VOH VLOGIC − 0.4 V ISOURCE = 200 μA Floating State Output Capacitance 4 pF POWER REQUIREMENTS VLOGIC 1.8 5.5 V ILOGIC 3 µA Power-on, −40°C + 105°C 3 µA Power-on, −40°C + 125°C 3 µA Power-down, −40°C + 105°C 3 µA Power-down, −40°C + 125°C VDD 2.7 5.5 V Gain = 1 VREF + 1.5 5.5 V Gain = 2 IDD VIH = VDD, VIL = GND, VDD = 2.7 V to 5.5 V Normal Mode9 1.1 1.26 mA Internal reference off, −40°C to +85°C 1.8 2.0 mA Internal reference on, −40°C to +85°C 1.1 1.3 mA Internal reference off 1.8 2.1 mA Internal reference on All Power-Down Modes10 1 1.7 µA Tristate to 1 kΩ, −40°C to +85°C 1 1.7 µA Power down to 1 kΩ, −40°Cto +85°C 1 2.5 µA Tristate, −40°C to +105°C 1 2.5 µA Power down to 1 kΩ, −40°C to +105°C 1 5.5 µA Tristate to 1 kΩ, −40°C to +125°C 1 5.5 µA Power down to 1 kΩ, −40°C to +125°C 1 DC specifications tested with the outputs unloaded, unless otherwise noted. Upper dead band = 10 mV and exists only when VREF = VDD with gain = 1, or when VREF/2 = VDD with gain = 2. Linearity calculated using a reduced code range of 12 to 4080. 2 Guaranteed by design and characterization; not production tested. 3 Together, Channel 0, Channel 1, Channel 2, and Channel 3 can source/sink 40 mA. Similarly, together, Channel 4, Channel 5, Channel 6, and Channel 7 can source/sink 40 mA up to a junction temperature of 125°C. 4 VDD = 5 V. The devices include current limiting to protect the devices during temporary overload conditions. Junction temperature can be exceeded during current limit. Operation above the specified maximum operation junction temperature may impair device reliability. 5 When drawing a load current at either rail, the output voltage headroom with respect to that rail is limited by the 25 Ω typical channel resistance of the output devices. For example, when sinking 1 mA, the minimum output voltage = 25 Ω × 1 mA = 25 mV. 6 Initial accuracy presolder reflow is ±750 µV; output voltage includes the effects of preconditioning drift. See the Internal Reference and Amplifier Gain Selection section. 7 Reference is trimmed and tested at two temperatures and is characterized from −40°C to +125°C. 8 Reference temperature coefficient calculated as per the box method. See the Terminology section for further information. 9 Interface inactive. All DACs active. DAC outputs unloaded. 10 All DACs powered down. |
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