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ZSC31150GLG1 Datasheet(PDF) 9 Page - Integrated Device Technology |
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ZSC31150GLG1 Datasheet(HTML) 9 Page - Integrated Device Technology |
9 / 26 page ZSC31150 Datasheet © 2016 Integrated Device Technology, Inc. 9 December 6, 2016 No. Parameter Symbol Conditions Min Typ Max Unit 1.4.1.5 SCL clock frequency [b] fSCL 400 kHz 1.4.1.6 Internal pull-up resistor [b] RI2C 25 100 k 1.4.2 ZACwire™ One Wire Interface (OWI) 1.4.2.1 Input-low level [b] VOWI_IN_L 0.2 VDDA 1.4.2.2 Input-high level [b] VOWI_IN_H 0.75 VDDA 1.4.2.3 Pull-up resistance master ROWI_PUP 0.3 3.3 k 1.4.2.4 OWI load capacitance COWI_LOAD Summarized OWI line load 50 nF 1.4.2.5 Start window [b] Typ: @ fCLK=3MHz 96 175 455 ms 1.4.3 EEPROM 1.4.3.1 Ambient temperature EEPROM programming [b] TAMB_EEP -40 150 C 1.4.3.2 Write cycles [b] nWRI_EEP Write temperature: <=85°C 100k Write temperature: up to 150°C 100 1.4.3.3 Read cycles [b], [c] nREAD_EEP Read temperature: <=175°C 8 * 108 1.4.3.4 Data retention [b], [d] tRET_EEP 1300h at 175°C =100000h at 55°C; 27000h at 125°C; 3000h at 150°C) 15 years 1.4.3.5 Programming time [b] tWRI_EEP Per written word, fCLK=3MHz 12 ms [a] Refer to the ZSC31150 Functional Description for timing details. [b] No measurement in mass production; parameter is guaranteed by design and/or quality observation. [c] Note that the package and temperature versions cause additional restrictions. [d] Over lifetime; use calculation sheet SSC Temperature Profile Calculation Spreadsheet for temperature stress calculation; note additional restrictions are caused by different package and temperature versions. |
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