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ZSC31015KIT Datasheet(PDF) 10 Page - Integrated Device Technology |
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ZSC31015KIT Datasheet(HTML) 10 Page - Integrated Device Technology |
10 / 52 page © 2016 Integrated Device Technology, Inc 10 November 14, 2016 ZSC31015 Datasheet Parameter Symbol Conditions Min Typ Max Unit Overall Accuracy – Digital (only IC, without sensor bridge) ACoutD -25°C to 85°C 0.1% %FSO -50°C to 150°C 0.25% Overall Accuracy – Analog 3), 4) (only IC, without sensor bridge) ACoutA -25°C to 85°C 0.25% %FSO -40°C to 125°C 0.35% -50°C to 150°C 0.5% 1) Note: This is 4 LSBs for the 14-bit A-to-D conversion. This results in absolute accuracy to 12-bits on the A-to-D result. Non-linearity is typically better at temperatures less than 125°C. 2) When using a pull-down resistor as the load resistor, the power loss detection diagnostic for loss of VSS cannot be assured at RL=5kΩ; RL=10kΩ is recommended for this configuration. 3) Not included is the quantization noise of the DAC. The 12-bit DAC has a quantization noise of ½ LSB = 0.61mV (@ 5V VDD) = 0.0125%. 4) Analog output range 2.5% to 95% 1.4. Analog Inputs versus Output Resolution The ZSC31015 has a fully differential chopper-stabilized pre-amplifier with four programmable gain settings. The output of the pre-amplifier feeds into a 14-bit charge-balanced ADC. Span, offset, temperature, and non-linearity correction are performed in the digital domain. Then the resulting corrected bridge value can be output in analog form through a 12-bit DAC or as a 16-bit serial digital packet. The resolution of the output depends on the input span (bridge sensitivity) and the analog gain setting programmed. Digital gains can vary from [0,32). Analog gains available are 6, 24, 48, and 96. Note: At higher analog gain settings, there will be higher output resolution, but the ability of the ZSC31015 to handle large offsets decreases. This is expected because the offset is also amplified by the analog gain and can therefore saturate the ADC input. The following tables outline the guaranteed minimum resolution for a given bridge sensitivity range. Table 1.1 ADC Resolution Characteristics for an Analog Gain of 6 Analog Gain 6 Input Span [mV/V] Allowed Offset (+/- % of Span) 1 Minimum Guaranteed Resolution [Bits] Min Typ Max 57.8 80.0 105.8 38% 12.4 50.6 70.0 92.6 53% 12.2 43.4 60.0 79.4 73% 12.0 36.1 50.0 66.1 101% 11.7 28.9 40.0 52.9 142% 11.4 21.7 30.0 39.7 212% 11.4 1) In addition to Tco, Tcg. |
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