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74HCT40103N Datasheet(PDF) 9 Page - Integrated Circuit Systems |
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74HCT40103N Datasheet(HTML) 9 Page - Integrated Circuit Systems |
9 / 17 page 1998 Jul 08 9 Philips Semiconductors Product specification 8-bit synchronous binary down counter 74HC/HCT40103 tsu set-up time Pn to CP 20 11 25 30 ns 4.5 Fig.12 th hold time PE to CP 2 −3 2 2 ns 4.5 Fig.11 th hold time TE to CP 0 −10 0 0 ns 4.5 Fig.11 th hold time Pn to CP 0 −5 0 0 ns 4.5 Fig.12 fmax maximum clock pulse frequency 15 28 12 10 MHz 4.5 Fig.7 SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HCT VCC (V) WAVEFORMS +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. |
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