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EFM8LB11F32E-B-QFN24R Datasheet(PDF) 1 Page - Silicon Laboratories |
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EFM8LB11F32E-B-QFN24R Datasheet(HTML) 1 Page - Silicon Laboratories |
1 / 4 page Bulletin #1611083 _____________________________________________________________________________________________________ W7206F2 Silicon Labs Bulletin rev R The information contained in this document is PROPRIETARY to Silicon Laboratories, Inc. and shall not be reproduced or used in part or whole without Silicon Laboratories’ written consent. The document is uncontrolled if printed or electronically saved. Pg 3 User Registration Register today to create your account on Silabs.com. Your personalized profile allows you to receive technical document updates, new product announcements, “how-to” and design documents, product change notices (PCN) and other valuable content available only to registered users. http://www.silabs.com/profile Bulletin Date: 11/8/2016 Bulletin Effective Date: 11/8/2016 Title: EFM8LB1/BB3 Datasheet Update Bulletin Bulletin Details Description: Silicon Labs is pleased to announce the release of datasheet V1.0 and V1.01 for the EFM8 Laser Bee and the EFM8 Busy Bee 3 MCUs. The changes in the BB3 V1.0 datasheet are: - All to be determined (TBD) values have been filled in with full characterization data. - Added a note to clarify which DACs are available on the devices with only 2 DACs. - Added a table on SMbus timing and operating frequency in master mode. The table details minimum and maximum operating frequency for each class, hold times, start times, clock low and clock high periods, and start and stop conditions. - Added pinout information to the bootloader section to outline where the UART0 pins are located as well as the C2 pins for each package. - Added typical Cyclic Redundancy Check (CRC) Calculation Time for a read or write of a 256 byte block of flash at 48 MHz. The changes in the BB3 V1.01 datasheet are: - Added a note in the part number table to describe and give further detail on the I-grade devices. - Updated the QFN24 land pattern description to include the correct dimensions and openings to be used for the center pad. The changes to the LB1 V1.0 datasheet are: - All to be determined (TBD) values have been filled in with full characterization data. - Added a note to clarify which DACs are available on the devices with only 2 DACs. - Added a table on SMbus timing and operating frequency in master mode. The table details minimum and maximum operating frequency for each class, hold times, start times, clock low and clock high periods, and start and stop conditions. - Added pinout information to the bootloader section to outline where the UART0 and SMBus pins are located as well as the C2 pins for each package. - Added typical Cyclic Redundancy Check (CRC) Calculation Time for a read or write of a 256 byte block of flash at 48 MHz. The changes in the LB1 V1.01 datasheet are: -Updated the QFN24 land pattern description to include the correct dimensions and openings to be used for the center pad. If you have any questions please contact your Silicon Labs representative. Reason: Version 1.0 EFM8LB1 Datasheet release Version 1.01 EFM8LB1 Datasheet release Version 1.0 EFM8BB3 Datasheet release |
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