5

TPS7B6333-Q1, TPS7B6350-Q1

www.ti.com

SLVSDU9 – FEBRUARY 2017

Product Folder Links: TPS7B6333-Q1 TPS7B6350-Q1

Submit Documentation Feedback

Copyright © 2017, Texas Instruments Incorporated

(1)

AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic

discharge

±2000

V

Charged-device model (CDM), per AEC Q100-011

All pins

±500

Corner pins (1, 14, 15, and 28)

±750

6.3 Recommended Operating Conditions

Over operating ambient temperature range (unless otherwise noted)

MIN

MAX

UNIT

Unregulated input

IN

4

40

V

40-V pins

EN, FSEL, WTS

0

V

Regulated output

OUT

0

5.5

V

Power good, watchdog status,

reference oscillator

PG, WDO, ROSC

0

5.5

V

Low voltage pins

WD, WD_EN, PGADJ, DELAY, WRS

0

5.5

V

Output current

0

300

mA

–40

125

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report (SPRA953).

6.4 Thermal Information

TPS7B63xx-Q1

UNIT

PWP (HTSSOP)

16 PINS

Junction-to-ambient thermal resistance

39.7

°C/W

Junction-to-case (top) thermal resistance

28.9

°C/W

Junction-to-board thermal resistance

23.8

°C/W

Junction-to-top characterization parameter

1.3

°C/W

Junction-to-board characterization parameter

23.7

°C/W

Junction-to-case (bottom) thermal resistance

3.1

°C/W